DATA SHEET SKY53510/SKY53580/SKY53540 Low-Power DC to 3.1 GHz
Ultra-Low Additive Jitter Differential Clock Buffers
The SKY53510/80/40 family of fanout buffers is ideal
for high-frequency, low-jitter clock distribution.
These devices feature universal level format
translation and ultra-low additive RMS phase jitter
over a wide range of conditions, including frequency
and input clock slew rate.
Separate core and output voltages are included,
supporting down to 1.8 V to enable additional power
savings.
Built-in LDOs deliver high PSRR performance and
reduce the need for external components, simplifying
low-jitter clock distribution in noisy environments.
The SKY53510/80/40 features a selectable input clock
using a 3:1 input mux, one single-ended output, and
either 10, 8, or 4 differential outputs in two banks,
each of which is selectable as LVPECL, LVDS, HCSL, or
tristate and whose voltage supply is independently
sourced with either 1.8 V, 2.5 V, or 3.3 V.
Each output bank has its own dedicated 1.8 V, 2.5 V, or
3.3 V output voltage supply. This buffer family can be
paired with the Skyworks NetSync™ family of network …
