Datasheet Analog Devices ADL5391ACPZ-R2 — 数据表

DC to 2.0 GHz Multiplier
ADL5391 Data Sheet FUNCTIONAL BLOCK DIAGRAM Ultrafast symmetric multiplier
Function: VW = α × (VX × VY)/1 V + VZ
Unique design ensures absolute XY-symmetry
Identical X and Y amplitude/timing responses
Adjustable gain scaling, α
DC-coupled throughout, 3 dB bandwidth of 2 GHz
Fully differential inputs, may be used single ended
Low noise, high linearity
Accurate, temperature stable gain scaling
Single-supply operation (4.5 V to 5.5 V at 130 mA)
Low current power-down mode
16-lead LFCSP YMNS YPLS GADJ XPLS ZMNS XMNS ZPLS
WPLS ENBL WMNS ADL5391 VMID W = αXY/1V+Z
COMM VPOS 06059-001 FEATURES Figure 1. APPLICATIONS
Wideband multiplication and summing
High frequency analog modulation
Adaptive antennas (diversity/phased array)
Square-law detectors and true rms detectors
Accurate polynomial function synthesis
DC capable VGA with very fast control GENERAL DESCRIPTION
The ADL5391 draws on three decades of experience in
advanced analog multiplier products. It provides the same …