Datasheet Analog Devices ADP7159ACPZ-01-R7 — 数据表

2 A, Ultralow Noise,
High PSRR, RF Linear Regulator
ADP7159 Data Sheet
FEATURES TYPICAL APPLICATION CIRCUIT Regulation to noise sensitive applications: phase-locked
loops (PLLs), voltage controlled oscillators (VCOs), and
PLLs with integrated VCOs
Communications and infrastructure
Backhaul and microwave links GENERAL DESCRIPTION
The ADP7159 is an adjustable linear regulator that operates from
2.3 V to 5.5 V and provides up to 2 A of output current. Output
voltages from 1.2 V to 3.3 V are possible depending on the model.
Using an advanced proprietary architecture, the device provides
high power supply rejection and ultralow noise, achieving excellent
line and load transient response with only a 10 μF ceramic
output capacitor.
The ADP7159 is available in four models that optimize power
dissipation and PSRR performance as a function of the input
and output voltage. See Table 9 and Table 10 for selection guides.
The typical output noise of the ADP7159 regulator is 0.9 μV rms
from 100 Hz to 100 kHz and 1.7 nV/√Hz for noise spectral density
from 10 kHz to 1 MHz. The ADP7159 is available in 10-lead,
3 mm × 3 mm LFCSP and 8-lead SOIC packages, making it not
only a very compact solution, but also providing excellent thermal …