Datasheet Analog Devices AD9689BBPZRL-2000 — 数据表

14-Bit, 2.6 GSPS, JESD204B,
Dual Analog-to-Digital Converter
AD9689 Data Sheet
FEATURES Programmable FIR filters for analog channel loss equalization
Two Integrated, wideband digital processors per channel
48-bit NCO
Programmable decimation rates
Phase coherent NCO switching
Up to 4 channels available
Serial port control
Supports 100 MHz SPI writes and 50 MHz SPI reads
Integer clock with divide by 2 and divide by 4 options
Flexible JESD204B lane configurations
On-chip dither JESD204B (Subclass 1) coded serial digital outputs
Support for lane rates up to 16 Gbps per lane
Noise density
−152 dBFS/Hz at full-scale voltage = 1.7 V p-p
−154 dBFS/Hz at full-scale voltage = 2.0 V p-p
1.55 W total power per channel at 2.6 GSPS (default settings)
SFDR at 2.56 GSPS encode
73 dBFS at 1.8 GHz AIN at −2.0 dBFS
59 dBFS at 5.5 GHz AIN at −2.0 dBFS
(full-scale voltage = 1.1 V p-p) …