Datasheet Intersil HCS11KMSR — 数据表

DATASHEET
HCS11MS FN3048
Rev 0.00
November 1994 Radiation Hardened Triple 3-Input AND Gate Features Pinouts 3 Micron Radiation Hardened SOS CMOS 14 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C
TOP VIEW Total Dose 200K or 1 Mega-RAD(Si) Dose Rate Upset >1010 RAD(Si)/s 20ns Pulse Cosmic Ray Upset Immunity < 2 x 10-9 Errors/Gate Day
(Typ) Latch-Up Free Under Any Conditions Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V Input Logic Levels
-VIL = 30% of VCC Max
-VIH = 70% of VCC Min A1 1 14 VCC B1 2 13 C1 A2 3 12 Y1 B2 4 11 C3 C2 5 10 B3 Y2 6 9 A3 GND 7 8 Y3 Input Current Levels Ii п‚Ј 5пЃ­A at VOL, VOH Description
The Intersil HCS11MS is a Radiation Hardened Triple 3Input AND Gate. A high on all inputs forces the output to a
High state.
The HCS11MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS11MS is supplied in a 14 lead Weld Seal Ceramic
flatpack (K suffix) or a Weld Seal Ceramic Dual-In-Line
Package (D suffix). Truth Table 14 PIN CERAMIC FLAT PACK
MIL-STD-1835 DESIGNATOR CDFP3-F14, LEAD FINISH C
TOP VIEW
A1 1 14 VCC B1 2 13 C1 A2 3 12 Y1 B2 4 11 C3 C2 5 10 B3 Y2 6 9 A3 GND 7 8 Y3 Functional Diagram
INPUTS OUTPUTS An Bn Cn Yn L L L L L L H L L H L L L H H L H L L L H L H L H H L L H H H H (1, 3, 9)
An (2, 4, 10)
Bn (12, 6, 8) …