Package Intersil L48.7x7Y — 数据表

Plastic Packages for Integrated Circuits Package Outline Drawing
L48.7x7Y
48 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (PUNCH-QFN)
Rev 0 10/12)
MILLIMETERS aaa C A
A D
D1
aaa C B MIN NOM MAX MIN NOM MAX A -0.90 -0.035 A1 0.00 0.01 0.05 A2 -0.65 0.70 A3
b 0.18 E E1
1.22 bbb C A 0.007 0.009 0.011
0.276 BSC 4.10 0.266 BSC
4.20 0.157 0.161 0.165 0.276 BSC 6.75 BSC 0.266 BSC E2 4.00 4.10 4.20 0.157 0.161 0.165 L 0.30 0.40 0.50 0.012 0.016 0.020 e
B 0.28 7.00 BSC E1 1.23 0.23 0.026 0.028
0.008 REF. 6.75 BSC
4.00 E bbb C B -7.00 BSC D1
D2 0.00 0.0004 0.002 0.20 REF. D 0.50 DIA. INCH SYMBOL 0.50 BSC 0.020 BSC Оё 0В° -12В° 0В° -12В° R 0.075 -0.003 -TOLERANCES OF FORM AND POSITION
TOP VIEW D2 aaa 0.10 0.004 bbb 0.10 0.004 ccc 0.05 0.002 *Controlling Dimension: mm 0.42В±0.18 0.45 NOTES: 0.42В±0.18 PIN1 ID
0.20 R 2. Die Thickness allowable is 0.305mm maximum
(0.012 inches maximum). E2 R 1. All Dimensions are in Millimeters. 3. Dimensioning and Tolerances conform to ASME
Y14.5M-1994.
4. Dimension applies to plated terminal and is measured
between 0.20 and 0.25mm from terminal tip. 0. 20 5. The pin #1 identifier must be placed on the top surface of the
package by using indentation mark or other feature of …