Datasheet Intersil ISL22326WM — 数据表

DATASHEET
ISL22326WM FN6623
Rev 1.00
November 11, 2011 Dual Digitally Controlled Potentiometers (XDCPв„ў) Low Noise, Low Power, I2C
Bus, 128 Taps
The ISL22326WMVEP integrates two digitally controlled
potentiometers (XDCP) and non-volatile memory on a
monolithic CMOS integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. Each potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up, the device recalls the contents of the two
DCP’s IVR to the corresponding WRs.
The DCPs can be used as three-terminal potentiometers or
as two-terminal variable resistors in a wide variety of
applications including control, parameter adjustments and
signal processing. Features Specifications per DLA VID V62/08604-01XE Full Mil-Temp Electrical Performance from -55В°C to +125В°C Controlled Baseline with One Wafer Fabrication Site and
One Assembly/Test Site Full Homogeneous Lot Processing in Wafer Fab No Combination of Wafer Fabrication Lots in Assembly Full Traceability Through Assembly and Test by
Date/Trace Code Assignment Enhanced Process Change Notification Enhanced Obsolescence Management Eliminates Need for Up-Screening a COTS Component Two Potentiometers in One Package Device Information 128 Resistor Taps The specifications for an Enhanced Product (EP) device are …