Datasheet Intersil X9268TS24IZ-2.7T1 — 数据表

DATASHEET
X9268
Dual Supply/Low Power/256-Tap/2-Wire Bus Dual Digitally-Controlled (XDCPв„ў)
Potentiometers FN8172
Rev.4.00
August 29, 2006 FEATURES DESCRIPTION Dual–Two Separate Potentiometers 256 Resistor Taps/Pot–0.4% Resolution 2-Wire Serial Interface for Write, Read, and
Transfer Operations of the Potentiometer Wiper Resistance, 100пЃ— typical @ V+ = 5V,
V-= -5V 16 Nonvolatile Data Registers for Each
Potentiometer Nonvolatile Storage of Multiple Wiper Positions Power-on Recall. Loads Saved Wiper Position on
Power-up. Standby Current <5ВµA Max VCC: В±2.7V to В±5.5V Operation 50kпЃ—, 100kпЃ— Versions of End to End Pot
Resistance Endurance: 100,000 Data Changes per Bit per
Register 100 yr. Data Retention 24 Ld SOIC Low Power CMOS Power Supply VCC = В±2.7V to В±5.5V
V+ = 2.7V to 5.5V
V-= -2.7V to -5.5V Pb-Free Plus Anneal Available (RoHS Compliant) The X9268 integrates 2 digitally controlled
potentiometer (XDCP) on a monolithic CMOS
integrated circuit.
The digital controlled potentiometer is implemented
using 255 resistive elements in a series array.
Between each element are tap points connected to the
wiper terminal through switches. The position of the
wiper on the array is controlled by the user through the
2-Wire bus interface. Each potentiometer has
associated with it a volatile Wiper Counter Register …