Datasheet Microchip PIC16F18313-I/SN — 数据表

PIC16(L)F18313/18323
Full-Featured, Low Pin Count Microcontrollers with XLP
Description
PIC16(L)F18313/18323 microcontrollers feature Analog, Core Independent Peripherals and Communication
Peripherals, combined with eXtreme Low Power (XLP) for a wide range of general purpose and low-power applications.
The Peripheral Pin Select (PPS) functionality enables pin mapping when using the digital peripherals (CLC, CWG, CCP,
PWM and communications) to add flexibility to the application design. Core Features Power-Saving Functionality • C Compiler Optimized RISC Architecture
• Only 48 Instructions
• Operating Speed:
-DC – 32 MHz clock input
-125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Up to Four 8-bit Timers
• Up to Three 16-bit Timers
• Low-Current Power-on Reset (POR)
• Power-up Timer (PWRT)
• Brown-out Reset (BOR)
• Low-Power BOR (LPBOR) Option
• Extended Watchdog Timer (WDT) with Dedicated
On-Chip Oscillator for Reliable Operation
• Programmable Code Protection • Idle mode: ability to put the CPU core to Sleep
while internal peripherals continue operating from …

PIC16(L)F18313/18323
Full-Featured, Low Pin Count Microcontrollers with XLP
Description
PIC16(L)F18313/18323 microcontrollers feature Analog, Core Independent Peripherals and Communication
Peripherals, combined with eXtreme Low Power (XLP) for a wide range of general purpose and low-power applications.
The Peripheral Pin Select (PPS) functionality enables pin mapping when using the digital peripherals (CLC, CWG, CCP,
PWM and communications) to add flexibility to the application design. Core Features Power-Saving Functionality C Compiler Optimized RISC Architecture Only 48 Instructions Operating Speed:
-DC – 32 MHz clock input
-125 ns minimum instruction cycle Interrupt Capability 16-Level Deep Hardware Stack Up to Four 8-bit Timers Up to Three 16-bit Timers Low-Current Power-on Reset (POR) Power-up Timer (PWRT) Brown-out Reset (BOR) Low-Power BOR (LPBOR) Option Extended Watchdog Timer (WDT) with Dedicated
On-Chip Oscillator for Reliable Operation Programmable Code Protection IDLE mode: ability to put the CPU core to Sleep
while internal peripherals continue operating from
the system clock DOZE mode: ability to run the CPU core slower
than the system clock used by the internal peripherals SLEEP mode: Lowest Power Consumption Peripheral Module Disable (PMD): peripheral
power disable hardware module to minimize
power consumption of unused peripherals Memory 3.5 Kbytes Program Flash Memory
256B Data SRAM Memory
256B of EEPROM
Direct, Indirect and Relative Addressing Modes Operating Characteristics Operating Voltage Range:
-1.8V to 3.6V (PIC16LF18313/18323)
-2.3V to 5.5V (PIC16F18313/18323) Temperature Range:
-Industrial: -40В°C to 85В°C
-Extended: -40В°C to 125В°C eXtreme Low-Power (XLP) Features Sleep mode: 40 nA @ 1.8V, typical
Watchdog Timer: 250 nA @ 1.8V, typical …