Dual, 16-Bit, 1600 MSPS, TxDAC+
Digital-to-Analog Converter
AD9142 Data Sheet
FEATURES GENERAL DESCRIPTION Very small inherent latency variation: 85 dBc (bandwidth = 300 MHz) at ZIF
Flexible 16-bit LVDS interface
Supports word and byte load
Multiple chip synchronization
Fixed latency and data generator latency compensation
Selectable 2×, 4×, 8× interpolation filter
Low power architecture
fS/4 power saving coarse mixer
Input signal power detection
Emergency stop for downstream analog circuitry
protection
FIFO error detection
On-chip numeric control oscillator allows carrier placement
anywhere in the DAC Nyquist bandwidth
Transmit enable function for extra power saving
High performance, low noise PLL clock multiplier
Digital gain and phase adjustment for sideband suppression
Digital inverse sinc filter
Supports single DAC mode
Low power: 2.0 W at 1.6 GSPS, 1.7 W at 1.25 GSPS, full
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