Tiny 16-/14-/12-Bit I2C nanoDAC+, with
В±2 LSB INL (16-Bit) and 2 ppm/В°C Reference AD5693R/AD5692R/AD5691R/AD5693 Data Sheet FUNCTIONAL BLOCK DIAGRAM
VLOGIC POWER-ON
RESET LDAC REF
16-/14-/12-BIT
DAC RESET INPUT
CONTROL LOGIC SDA SCL A0 RESISTOR
NETWORK GND VREF VDD REF
16-/14-/12-BIT
DAC INPUT
CONTROL LOGIC GENERAL DESCRIPTION SDA SCL AD5693R/
AD5692R/
AD5691R/
AD5693 2.5V REF2 DAC
REGISTER The AD5693R/AD5692R/AD5691R/AD5693 use an I C
interface. Some device options also include an asynchronous
RESET pin and a VLOGIC pin, allowing 1.8 V compatibility. VOUT Figure 1. MSOP
LDAC OR VLOGIC OR RESET1 Process controls
Data acquisition systems
Digital gain and offset adjustment
Programmable voltage sources
Optical modules The internal power-on reset circuit ensures that the DAC register
is written to zero scale at power-up while the internal output …