Quad, 16-Bit, 2.8 GSPS, TxDAC+В®
Digital-to-Analog Converter
AD9144 Data Sheet
FEATURES TYPICAL APPLICATION CIRCUIT Supports input data rate >1 GSPS
Proprietary low spurious and distortion design
6-carrier GSM IMD = 77 dBc at 75 MHz IF
SFDR = 82 dBc at dc IF, -9 dBFS
Flexible 8-lane JESD204B interface
Support quad or dual DAC mode at 2.8 GSPS
Multiple chip synchronization
Fixed latency
Data generator latency compensation
Selectable 1Г—, 2Г—, 4Г—, 8Г— interpolation filter
Low power architecture
Input signal power detection
Emergency stop for downstream analog circuitry protection
Transmit enable function allows extra power saving
High performance, low noise phase-locked loop (PLL) clock
multiplier
Digital inverse sinc filter
Low power: 1.6 W at 1.6 GSPS, 1.7 W at 2.0 GSPS,
full operating conditions
88-lead LFCSP with exposed pad QUAD MOD …