Datasheet Analog Devices AD9135BCPAZRL — 数据表

FEATURES TYPICAL APPLICATION CIRCUIT Support input data rate >2 GSPS
Proprietary low spurious and distortion design
SFDR = 82 dBc at dc IF, -9 dBFS
Flexible 8-lane JESD204B interface
Multiple chip synchronization
Fixed latency
Data generator latency compensation
Selectable 1Г—, 2Г—, 4Г—, or 8Г— interpolation filter
Low power architecture
Transmit enable function allows extra power saving and
instant control of the output status
High performance, low noise phase-locked loop (PLL) clock
multiplier
Digital inverse sinc filter
Low power: 1.42 W at 1.6 GSPS full operating conditions
88-lead LFCSP with exposed pad QUAD MOD LPF ADRF6720 SYSREFВ±
DAC 0В°/90В° PHASE
SHIFTER RF OUTPUT JESD204B
DAC SYNCOUT0В±
SYNCOUT1В± AD9135/
AD9136
LO_IN MOD_SPI
CLKВ± DAC …