Datasheet Analog Devices AD7177-2 — 数据表

32-Bit, 10 kSPS, Sigma-Delta ADC with 100 µs
Settling and True Rail-to-Rail Buffers AD7177-2 Data Sheet
FEATURES GENERAL DESCRIPTION 32-bit data output
Fast and flexible output rate: 5 SPS to 10 kSPS
Channel scan data rate of 10 kSPS/channel (100 µs settling)
Performance specifications
19.1 noise free bits at 10 kSPS
20.2 noise free bits at 2.5 kSPS
24.6 noise free bits at 5 SPS
INL: ±1 ppm of FSR
85 dB filter rejection of 50 Hz and 60 Hz with 50 ms settling
User configurable input channels
2 fully differential channels or 4 single-ended channels
Crosspoint multiplexer
On-chip 2.5 V reference (±2 ppm/°C drift)
True rail-to-rail analog and reference input buffers
Internal or external clock
Power supply: AVDD1 − AVSS = 5 V, AVDD2 = IOVDD = 2.5 V
to 5 V
Split supply with AVDD1/AVSS at ±2.5 V
ADC current: 8.4 mA
Temperature range: −40°C to +105°C
3-or 4-wire serial digital interface (Schmitt trigger on SCLK) …