Datasheet Linear Technology LTC1450 — 数据表

制造商Linear Technology
系列LTC1450

SSOP中的并行输入,12位轨至轨微功耗DAC

数据表

LTC1450/LTC1450L - Parallel Input, 12-Bit Rail-to-Rail Micropower DACs in SSOP
PDF, 298 Kb, 文件上传: Aug 22, 2017
从文件中提取

价格

打包

LTC1450CG#PBFLTC1450CG#TRPBFLTC1450CN#PBFLTC1450IG#PBFLTC1450IG#TRPBFLTC1450IN#PBF
N123456
PackageSSOP-24
包装外形图
SSOP-24
包装外形图
N-24
包装外形图
SSOP-24
包装外形图
SSOP-24
包装外形图
N-24
包装外形图
Package CodeGGNGGN
Package Index05-08-1640 (G24)05-08-1640 (G24)05-08-1510 (N24)05-08-1640 (G24)05-08-1640 (G24)05-08-1510 (N24)
Pin Count242424242424

参数化

Parameters / ModelsLTC1450CG#PBFLTC1450CG#TRPBFLTC1450CN#PBFLTC1450IG#PBFLTC1450IG#TRPBFLTC1450IN#PBF
Bits, bits121212121212
DAC INL, LSB3.53.53.53.53.53.5
DACs111111
DNL, LSB0.50.50.50.50.50.5
Export Controlnononononono
Ext Vref Range0V to VCC-1.5 or VCC/20V to VCC-1.5 or VCC/20V to VCC-1.5 or VCC/20V to VCC-1.5 or VCC/20V to VCC-1.5 or VCC/20V to VCC-1.5 or VCC/2
I/OParallelParallelParallelParallelParallelParallel
Int Ref, V2.0482.0482.0482.0482.0482.048
Max Offset Error, mV181818181818
Operating Temperature Range, °C0 to 700 to 700 to 70-40 to 85-40 to 85-40 to 85
OutputVoltageVoltageVoltageVoltageVoltageVoltage
Output Range0V to 4.096V, 0V to VREF, 0V to 2*VREF0V to 4.096V, 0V to VREF, 0V to 2*VREF0V to 4.096V, 0V to VREF, 0V to 2*VREF0V to 4.096V, 0V to VREF, 0V to 2*VREF0V to 4.096V, 0V to VREF, 0V to 2*VREF0V to 4.096V, 0V to VREF, 0V to 2*VREF
Power, mW222222
Power-On-ResetZero-ScaleZero-ScaleZero-ScaleZero-ScaleZero-ScaleZero-Scale
Settling Time, µs141414141414
Supply Voltage Range5V5V5V5V5V5V

生态计划

LTC1450CG#PBFLTC1450CG#TRPBFLTC1450CN#PBFLTC1450IG#PBFLTC1450IG#TRPBFLTC1450IN#PBF
RoHSCompliantCompliantCompliantCompliantCompliantCompliant

其他选择

LTC1450L

设计须知

  • 3V and 5V 12-Bit Rail-to-Rail Micropower DACs Combine Flexibility and Performance &mdash DN127
    PDF, 89 Kb, 档案已发布: Apr 1, 1996
    从文件中提取

模型线

制造商分类

  • Data Conversion > Digital-to-Analog Converters (DAC) > Voltage Output DACs | Unipolar Digital-to-Analog Converters (DAC)