Datasheet Linear Technology LTC2410 — 数据表

制造商Linear Technology
系列LTC2410

具有差分输入和差分基准的24位无延迟Delta Sigma ADC

数据表

Datasheet LTC2410
PDF, 804 Kb, 语言: en, 文件上传: Aug 21, 2017, 页数: 50
24-Bit No Latency ∆Σ™ ADC with Differential Input and Differential Reference
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价格

打包

LTC2410CGN#PBFLTC2410CGN#TRPBFLTC2410IGN#PBFLTC2410IGN#TRPBF
N1234
PackageSSOP-16
包装外形图
SSOP-16
包装外形图
SSOP-16
包装外形图
SSOP-16
包装外形图
Package CodeGNGNGNGN
Package Index05-08-1641 (GN16)05-08-1641 (GN16)05-08-1641 (GN16)05-08-1641 (GN16)
Pin Count16161616

参数化

Parameters / ModelsLTC2410CGN#PBFLTC2410CGN#TRPBFLTC2410IGN#PBFLTC2410IGN#TRPBF
ADC INL, LSB33.533.533.533.5
ADCs1111
ArchitectureDelta SigmaDelta SigmaDelta SigmaDelta Sigma
Bipolar/Unipolar InputUnipolarUnipolarUnipolarUnipolar
Bits, bits24242424
Number of Channels1111
DNL, LSB1111
Demo BoardsDC575ADC575ADC575ADC575A
Export Controlnononono
FeaturesNo LatencyNo LatencyNo LatencyNo Latency
I/OSerial SPISerial SPISerial SPISerial SPI
INL ppm, ppm2222
Input DriveDifferentialDifferentialDifferentialDifferential
Input SpanВ±VREF/2В±VREF/2В±VREF/2В±VREF/2
Internal Referencenononono
Operating Temperature Range, °C0 to 700 to 70-40 to 85-40 to 85
Power, mW1111
Simultaneousnononono
Speed, ksps0.00750.00750.00750.0075
Supply Voltage Range2.7V to 5.5V2.7V to 5.5V2.7V to 5.5V2.7V to 5.5V

生态计划

LTC2410CGN#PBFLTC2410CGN#TRPBFLTC2410IGN#PBFLTC2410IGN#TRPBF
RoHSCompliantCompliantCompliantCompliant

应用须知

  • A Standards Lab Grade 20-Bit DAC with 0.1ppm/В° Drift: The Dedicated Art of Digitizing One Part Per Million &mdash AN86
    PDF, 540 Kb, 档案已发布: Jan 1, 2001
    This publication details a true 1ppm D-to-A converter. Total DC error of this processor corrected DAC remains within 1ppm from 18-32°C, including reference drift. DAC error exclusive of reference drift is substantially better. Construction details and performance verification techniques are included, along with a complete software listing.
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  • Delta Sigma ADC Bridge Measurement Techniques &mdash AN96
    PDF, 232 Kb, 档案已发布: Jan 17, 2005
    AN96 features several applications that demonstrate how to take full advantage of Linear Technology's delta sigma ADCs when interfacing to sensors. In many cases, signal conditioning can be greatly simplified or eliminated completely. This note explains where it is appropriate to use amplifiers and how to optimize amplifier gain. Also included are discussions on measuring effective number of bits (ENOB) and the relationship to instrument performance, frequency response of delta sigma ADCs, and test techniques. C source code for all of the applications is included to aid firmware development.
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文章

  • Easy-to-Use Spread Spectrum Clock Generator Reduces EMI and More &mdash LT Journal
    PDF, 847 Kb, 档案已发布: Feb 1, 2004
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  • No Latency Delta-Sigma ADC Techniques for Optimized Performance &mdash LT Journal
    PDF, 239 Kb, 档案已发布: May 1, 2001
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  • Using Bipolar Preamplifiers in an LTC2411-Based Correlated Double Sampling Scheme Produces a Noise Floor of Under 100nVRMS &mdash LT Journal
    PDF, 160 Kb, 档案已发布: May 1, 2001
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  • A New, Fully Differential, No Latency Delta-Sigma ADC Family &mdash LT Journal
    PDF, 141 Kb, 档案已发布: Nov 1, 2000
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模型线

制造商分类

  • Data Conversion > Analog-to-Digital Converters (ADC) > Precision ADCs (Fs < 10Msps) > Single Channel ADCs