Datasheet Linear Technology LTC2273 — 数据表

制造商Linear Technology
系列LTC2273

16位,80Msps串行输出ADC(JESD204)

数据表

Datasheet LTC2273, LTC2272
PDF, 791 Kb, 语言: en, 文件上传: Aug 20, 2017, 页数: 44
16-Bit, 80Msps Serial Output ADC (JESD204)
从文件中提取

价格

打包

LTC2273CUJ#PBFLTC2273CUJ#TRPBFLTC2273IUJ#PBFLTC2273IUJ#TRPBF
N1234
Package6x6 QFN-40
包装外形图
6x6 QFN-40
包装外形图
6x6 QFN-40
包装外形图
6x6 QFN-40
包装外形图
Package CodeUJUJUJUJ
Package Index05-08-172805-08-172805-08-172805-08-1728
Pin Count40404040

参数化

Parameters / ModelsLTC2273CUJ#PBFLTC2273CUJ#TRPBFLTC2273IUJ#PBFLTC2273IUJ#TRPBF
ADC INL, LSB1.21.21.21.2
ADCs1111
ArchitecturePipelinePipelinePipelinePipeline
Bipolar/Unipolar InputBipolarBipolarBipolarBipolar
Bits, bits16161616
Number of Channels1111
DNL, LSB0.30.30.30.3
Demo BoardsDC1151A-E,DC1151A-FDC1151A-E,DC1151A-FDC1151A-E,DC1151A-FDC1151A-E,DC1151A-F
Export Controlyesyesyesyes
Features2.1Gbps JESD204, High IF Sampling, PGA, Internal Dither, Clock Duty Cycle Stabilizer2.1Gbps JESD204, High IF Sampling, PGA, Internal Dither, Clock Duty Cycle Stabilizer2.1Gbps JESD204, High IF Sampling, PGA, Internal Dither, Clock Duty Cycle Stabilizer2.1Gbps JESD204, High IF Sampling, PGA, Internal Dither, Clock Duty Cycle Stabilizer
I/OSerial JESD204Serial JESD204Serial JESD204Serial JESD204
Input DriveDifferentialDifferentialDifferentialDifferential
Input Span2.25Vpp or 1.5Vpp2.25Vpp or 1.5Vpp2.25Vpp or 1.5Vpp2.25Vpp or 1.5Vpp
Internal Referenceyesyesyesyes
Latency9999
Operating Temperature Range, °C0 to 700 to 70-40 to 85-40 to 85
Power, mW1100110011001100
SFDR, dB100100100100
SINAD, dB77.677.677.677.6
SNR, dB77.677.677.677.6
Simultaneousnononono
Speed, ksps80000800008000080000
Supply Voltage Range3.3V3.3V3.3V3.3V

生态计划

LTC2273CUJ#PBFLTC2273CUJ#TRPBFLTC2273IUJ#PBFLTC2273IUJ#TRPBF
RoHSCompliantCompliantCompliantCompliant

其他选择

LTC2272 LTC2272

模型线

制造商分类

  • Data Conversion > Analog-to-Digital Converters (ADC) > High Speed ADCs (Fs >=10Msps)