Datasheet Linear Technology LTC2123 — 数据表

制造商	Linear Technology
系列	LTC2123

具有JESD204B串行输出的双路14位250Msps ADC

数据表

PDF, 1.2 Mb, 语言: en, 文件上传: Aug 19, 2017, 页数: 50
Dual 14-Bit 250Msps ADC with JESD204B Serial Outputs

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	LTC2123CUK#PBF	LTC2123CUK#TRPBF	LTC2123IUK#PBF	LTC2123IUK#TRPBF
N	1	2	3	4
Package	7x7 QFN-48 包装外形图	7x7 QFN-48 包装外形图	7x7 QFN-48 包装外形图	7x7 QFN-48 包装外形图
Package Code	UK	UK	UK	UK
Package Index	05-08-1704	05-08-1704	05-08-1704	05-08-1704
Pin Count	48	48	48	48

Parameters / Models	LTC2123CUK#PBF	LTC2123CUK#TRPBF	LTC2123IUK#PBF	LTC2123IUK#TRPBF
ADC INL, LSB	0.85	0.85	0.85	0.85
ADCs	2	2	2	2
Architecture	Pipeline	Pipeline	Pipeline	Pipeline
Bipolar/Unipolar Input	Bipolar	Bipolar	Bipolar	Bipolar
Bits, bits	14	14	14	14
Number of Channels	2	2	2	2
DNL, LSB	0.25	0.25	0.25	0.25
Demo Boards	DC1974A-B,DC2226A-A	DC1974A-B,DC2226A-A	DC1974A-B,DC2226A-A	DC1974A-B,DC2226A-A
Design Tools	LinearLabTools	LinearLabTools	LinearLabTools	LinearLabTools
Export Control	no	no	no	no
Features	5Gbps JESD204B, High IF Sampling, Simultaneous Sampling, Clock Duty Cycle Stabilizer	5Gbps JESD204B, High IF Sampling, Simultaneous Sampling, Clock Duty Cycle Stabilizer	5Gbps JESD204B, High IF Sampling, Simultaneous Sampling, Clock Duty Cycle Stabilizer	5Gbps JESD204B, High IF Sampling, Simultaneous Sampling, Clock Duty Cycle Stabilizer
I/O	Serial JESD204B	Serial JESD204B	Serial JESD204B	Serial JESD204B
Input Drive	Differential	Differential	Differential	Differential
Input Span	1.5Vpp	1.5Vpp	1.5Vpp	1.5Vpp
Internal Reference	yes	yes	yes	yes
Latency	6	6	6	6
Operating Temperature Range, °C	0 to 70	0 to 70	-40 to 85	-40 to 85
Power, mW	864	864	864	864
SFDR, dB	90	90	90	90
SINAD, dB	69.9	69.9	69.9	69.9
SNR, dB	70	70	70	70
Simultaneous	yes	yes	yes	yes
Speed, ksps	250000	250000	250000	250000
Supply Voltage Range	1.8V	1.8V	1.8V	1.8V

	LTC2123CUK#PBF	LTC2123CUK#TRPBF	LTC2123IUK#PBF	LTC2123IUK#TRPBF
RoHS	Compliant	Compliant	Compliant	Compliant

系列: LTC2123 (4)

Data Conversion > Analog-to-Digital Converters (ADC) > High Speed ADCs (Fs >=10Msps)