Datasheet Texas Instruments TLV5624 — 数据表
| 制造商 | Texas Instruments |
| 系列 | TLV5624 |
8位1.0至3.5 us DAC，串行输入，可编程内部参考，建立时间
数据表
TLV5624 - 2.7 V To 5.5 V Low Power 8-Bit DAC w/ Internal Ref And Power Down datasheet
PDF, 969 Kb, 修订版: B, 档案已发布: Apr 8, 2004
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状态
| TLV5624CD | TLV5624CDG4 | TLV5624CDGK | TLV5624CDGKG4 | TLV5624CDGKR | TLV5624ID | TLV5624IDG4 | TLV5624IDGK | TLV5624IDGKG4 | TLV5624IDGKR | TLV5624IDR | TLV5624IDRG4 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | Yes | No | Yes | Yes | Yes | No | No | No | No | No |
打包
| TLV5624CD | TLV5624CDG4 | TLV5624CDGK | TLV5624CDGKG4 | TLV5624CDGKR | TLV5624ID | TLV5624IDG4 | TLV5624IDGK | TLV5624IDGKG4 | TLV5624IDGKR | TLV5624IDR | TLV5624IDRG4 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 |
| Pin | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Package Type | D | D | DGK | DGK | DGK | D | D | DGK | DGK | DGK | D | D |
| Industry STD Term | SOIC | SOIC | VSSOP | VSSOP | VSSOP | SOIC | SOIC | VSSOP | VSSOP | VSSOP | SOIC | SOIC |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 75 | 75 | 80 | 80 | 2500 | 75 | 75 | 80 | 80 | 2500 | 2500 | 2500 |
| Carrier | TUBE | TUBE | TUBE | TUBE | LARGE T&R | TUBE | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | LARGE T&R |
| Device Marking | 5624C | 5624C | ADR | ADR | ADR | 5624I | 5624I | ADS | ADS | ADS | 5624I | 5624I |
| Width (mm) | 3.91 | 3.91 | 3 | 3 | 3 | 3.91 | 3.91 | 3 | 3 | 3 | 3.91 | 3.91 |
| Length (mm) | 4.9 | 4.9 | 3 | 3 | 3 | 4.9 | 4.9 | 3 | 3 | 3 | 4.9 | 4.9 |
| Thickness (mm) | 1.58 | 1.58 | .97 | .97 | .97 | 1.58 | 1.58 | .97 | .97 | .97 | 1.58 | 1.58 |
| Pitch (mm) | 1.27 | 1.27 | .65 | .65 | .65 | 1.27 | 1.27 | .65 | .65 | .65 | 1.27 | 1.27 |
| Max Height (mm) | 1.75 | 1.75 | 1.07 | 1.07 | 1.07 | 1.75 | 1.75 | 1.07 | 1.07 | 1.07 | 1.75 | 1.75 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | TLV5624CD | TLV5624CDG4 | TLV5624CDGK | TLV5624CDGKG4 | TLV5624CDGKR | TLV5624ID | TLV5624IDG4 | TLV5624IDGK | TLV5624IDGKG4 | TLV5624IDGKR | TLV5624IDR | TLV5624IDRG4 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Code to Code Glitch(Typ), nV-sec | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 |
| DAC Architecture | String | String | String | String | String | String | String | String | String | String | String | String |
| DAC Channels | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Gain Error(Max), %FSR | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 |
| INL(Max), +/-LSB | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 |
| Interface | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI |
| Offset Error(Max), % | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
| Operating Temperature Range, C | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 |
| Output Range Max., mA/V | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 |
| Output Type | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage |
| Package Group | SOIC | SOIC | VSSOP | VSSOP | VSSOP | SOIC | SOIC | VSSOP | VSSOP | VSSOP | SOIC | SOIC |
| Package Size: mm2:W x L, PKG | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) |
| Power Consumption(Typ), mW | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 | 0.9 |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Reference: Type | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int |
| Resolution, Bits | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Sample / Update Rate, MSPS | 0.233 | 0.233 | 0.233 | 0.233 | 0.233 | 0.233 | 0.233 | 0.233 | 0.233 | 0.233 | 0.233 | 0.233 |
| Settling Time, µs | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Special Features | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
| Zero Code Error(Typ), mV | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
生态计划
| TLV5624CD | TLV5624CDG4 | TLV5624CDGK | TLV5624CDGKG4 | TLV5624CDGKR | TLV5624ID | TLV5624IDG4 | TLV5624IDGK | TLV5624IDGKG4 | TLV5624IDGKR | TLV5624IDR | TLV5624IDRG4 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
模型线
系列: TLV5624 (12)
制造商分类
- Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> Precision DACs (=<10MSPS)