Datasheet Texas Instruments TLV2556-EP — 数据表

制造商Texas Instruments
系列TLV2556-EP
Datasheet Texas Instruments TLV2556-EP

具有内部基准的增强型产品12位,200 KSPS,11通道,低功耗,串行ADC

数据表

12-Bit 200-KSPS 11-Channel Low-Power Serial ADC With Internal Reference datasheet
PDF, 908 Kb, 修订版: A, 档案已发布: Jul 27, 2009
从文件中提取

价格

状态

TLV2556MPWREPTLV2556MPWREPG4V62/08622-01XE
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYes

打包

TLV2556MPWREPTLV2556MPWREPG4V62/08622-01XE
N123
Pin202020
Package TypePWPWPW
Industry STD TermTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY200020002000
CarrierLARGE T&RLARGE T&RLARGE T&R
Device MarkingTL2556EPTL2556EPTL2556EP
Width (mm)4.44.44.4
Length (mm)6.56.56.5
Thickness (mm)111
Pitch (mm).65.65.65
Max Height (mm)1.21.21.2
Mechanical Data下载下载下载

参数化

Parameters / ModelsTLV2556MPWREP
TLV2556MPWREP
TLV2556MPWREPG4
TLV2556MPWREPG4
V62/08622-01XE
V62/08622-01XE
# Input Channels111111
Analog Voltage AVDD(Max), V5.55.55.5
Analog Voltage AVDD(Min), V2.72.72.7
ArchitectureSARSARSAR
Digital Supply(Max), V5.55.55.5
Digital Supply(Min), V2.72.72.7
INL(Max), +/-LSB111
InterfaceSPISPISPI
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125
Package GroupTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
Power Consumption(Typ), mW2.432.432.43
RatingHiRel Enhanced ProductHiRel Enhanced ProductHiRel Enhanced Product
Reference ModeExt,IntExt,IntExt,Int
Resolution, Bits121212
Sample Rate (max), SPS200kSPS200kSPS200kSPS

生态计划

TLV2556MPWREPTLV2556MPWREPG4V62/08622-01XE
RoHSCompliantCompliantCompliant

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters