Datasheet Texas Instruments TLV2548-EP — 数据表
| 制造商 | Texas Instruments |
| 系列 | TLV2548-EP |
增强型产品2位200 kSPS ADC系列输出，自动电源（S / W和H / W），低功耗W / 8 x FIFO W / 8 Ch
数据表
2.7-V to 5.5-V 12-Bit 200 KSPS 4-/8-Channel Low-Power Serial Converter datasheet
PDF, 1.3 Mb, 档案已发布: Oct 28, 2009
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价格
状态
| TLV2548MPWREP | V62/10603-01XE | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes |
打包
| TLV2548MPWREP | V62/10603-01XE | |
|---|---|---|
| N | 1 | 2 |
| Pin | 20 | 20 |
| Package Type | PW | PW |
| Industry STD Term | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 2000 | 2000 |
| Carrier | LARGE T&R | LARGE T&R |
| Device Marking | TV2548EP | TV2548EP |
| Width (mm) | 4.4 | 4.4 |
| Length (mm) | 6.5 | 6.5 |
| Thickness (mm) | 1 | 1 |
| Pitch (mm) | .65 | .65 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | 下载 | 下载 |
参数化
| Parameters / Models | TLV2548MPWREP | V62/10603-01XE |
|---|---|---|
| # Input Channels | 8 | 8 |
| Analog Voltage AVDD(Max), V | 5.5 | 5.5 |
| Analog Voltage AVDD(Min), V | 3 | 3 |
| Architecture | SAR | SAR |
| Digital Supply(Max), V | 5.5 | 5.5 |
| Digital Supply(Min), V | 3 | 3 |
| ENOB, Bits | 11.6 | 11.6 |
| INL(Max), +/-LSB | 1.2 | 1.2 |
| Interface | SPI | SPI |
| Operating Temperature Range, C | -55 to 125 | -55 to 125 |
| Package Group | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) |
| Power Consumption(Typ), mW | 3.3 | 3.3 |
| Rating | HiRel Enhanced Product | HiRel Enhanced Product |
| Reference Mode | Ext,Int | Ext,Int |
| Resolution, Bits | 12 | 12 |
| SFDR, dB | 84 | 84 |
| SNR, dB | 70 | 70 |
| Sample Rate (max), SPS | 200kSPS | 200kSPS |
生态计划
| TLV2548MPWREP | V62/10603-01XE | |
|---|---|---|
| RoHS | Compliant | Compliant |
应用须知
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: TLV2548-EP (2)
制造商分类
- Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters