Datasheet Analog Devices AD526JNZ — 数据表

REVISIONS
LTR DESCRIPTION A
B DATE (YR-MO-DA) APPROVED 01-08-30
06-11-15 R. MONNIN
R. MONNIN Drawing updated to reflect current requirements. -ro
Drawing updated as part of 5 year review. -rrp THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV
SHEET
REV
SHEET
REV STATUS REV B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 PMIC N/A PREPARED BY
RICK C. OFFICER STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE AMSC N/A B B B B 8 9 10 11 MICROCIRCUIT, LINEAR, PROGRAMMABLE GAIN
AMPLIFIER, MONOLITHIC SILICON DRAWING APPROVAL DATE
91-09-06 REVISION LEVEL
B SIZE CAGE CODE A 67268 SHEET
DSCC FORM 2233
APR 97 7 DEFENSE SUPPLY CENTER COLUMBUS …

a Software Programmable
Gain Amplifier
AD526 FEATURES
Digitally Programmable Binary Gains from 1 to 16
Two-Chip Cascade Mode Achieves Binary Gain from
1 to 256
Gain Error:
0.01% Max, Gain = 1, 2, 4 (C Grade)
0.02% Max, Gain = 8, 16 (C Grade)
0.5 ppm/ⴗC Drift Over Temperature
Fast Settling Time
10 V Signal Change:
0.01% in 4.5 ␮s (Gain = 16)
Gain Change:
0.01% in 5.6 ␮s (Gain = 16)
Low Nonlinearity: ⴞ0.005% FSR Max (J Grade)
Excellent DC Accuracy:
Offset Voltage: 0.5 mV Max (C Grade)
Offset Voltage Drift: 3 ␮V/ⴗC (C Grade)
TTL-Compatible Digital Inputs PIN CONFIGURATION DIG GND 1 16 A1 NULL 2 15 A0 14 CS VIN 3 CLK
TOP VIEW
ANALOG GND 2 5 (Not to Scale) 12 A2
NULL 4 AD526 13 ANALOG GND 1 6 11 B –VS 7 10 +VS VOUT SENSE 8 9 VOUT FORCE PRODUCT DESCRIPTION The AD526 is a single-ended, monolithic software programmable gain amplifier (SPGA) that provides gains of 1, 2, 4, 8 …