Datasheet Texas Instruments TCI6638K2K — 数据表

制造商Texas Instruments
系列TCI6638K2K
Datasheet Texas Instruments TCI6638K2K

多核DSP + ARM KeyStone II片上系统(SoC)

数据表

TCI6638K2K Multicore DSP+ARMВ® KeyStone II System-on-Chip (SoC) datasheet
PDF, 2.2 Mb, 修订版: F, 档案已发布: May 5, 2017
从文件中提取

价格

状态

TCI6638K2KBXAAW2
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

TCI6638K2KBXAAW2
N1
Pin1517
Package TypeAAW
Package QTY21
CarrierJEDEC TRAY (5+1)
Device Marking@2012 TI
Width (mm)40
Length (mm)40
Thickness (mm)3.07
Mechanical Data下载

生态计划

TCI6638K2KBXAAW2
RoHSCompliant

应用须知

  • Ethernet Packet Transfer Via FastC&M over AIF2 Application Report
    PDF, 168 Kb, 档案已发布: Dec 6, 2013
  • KeyStone I-to-KeyStone II Migration Guide (Rev. A)
    PDF, 479 Kb, 修订版: A, 档案已发布: Jul 30, 2015
    This guide describes the main System-on-Chip (SoC) level and peripheral changes that need to be considered when migrating a KeyStone I-based system design to a KeyStone II-based system design.In this guide, KeyStone I includes all TMS320TCI661x devices and KeyStone II includes all TCI663xK2y devices. Any differences within KeyStone I or KeyStone II devices are described explicitly.
  • Keystone II DDR3 Initialization
    PDF, 73 Kb, 档案已发布: Jan 26, 2015
    This application report provides a step-to-step initialization guide for the Keystone II device DDR3 SDRAM controller.
  • Throughput Performance Guide for KeyStone II Devices (Rev. B)
    PDF, 866 Kb, 修订版: B, 档案已发布: Dec 22, 2015
    This application report analyzes various performance measurements of the KeyStone II family of processors. It provides a throughput analysis of the various support peripherals to different end-points and memory access.
  • Keystone II DDR3 Debug Guide
    PDF, 143 Kb, 档案已发布: Oct 16, 2015
    This guide provides tools for use when debugging a failing DDR3 interface on a KeyStone II device.
  • Power Management of KS2 Device (Rev. C)
    PDF, 61 Kb, 修订版: C, 档案已发布: Jul 15, 2016
    This application report lists the steps to enable Class 0 Temperature Compensation (Class 0 TC) mode of SmartReflexв„ў Subsystem (SRSS) module available on such devices.
  • Hardware Design Guide for KeyStone II Devices
    PDF, 1.8 Mb, 档案已发布: Mar 24, 2014
  • SERDES Link Commissioning on KeyStone I and II Devices
    PDF, 138 Kb, 档案已发布: Apr 13, 2016
    The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices.
  • PCIe Use Cases for KeyStone Devices
    PDF, 320 Kb, 档案已发布: Dec 13, 2011
  • Clocking Design Guide for KeyStone Devices
    PDF, 1.5 Mb, 档案已发布: Nov 9, 2010
  • Optimizing Loops on the C66x DSP
    PDF, 585 Kb, 档案已发布: Nov 9, 2010
  • The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
    PDF, 20 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
  • DDR3 Design Requirements for KeyStone Devices (Rev. B)
    PDF, 582 Kb, 修订版: B, 档案已发布: Jun 5, 2014
  • Multicore Programming Guide (Rev. B)
    PDF, 1.8 Mb, 修订版: B, 档案已发布: Aug 29, 2012
    As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore
  • Thermal Design Guide for DSP and ARM Application Processors (Rev. A)
    PDF, 324 Kb, 修订版: A, 档案已发布: Aug 17, 2016
    This application report has been compiled to provide specific information and considerations regarding thermal design requirements for all DSP and ARM-based single and multi-core processors (collectively referred to as “processors”, “System-on-chip”, or “SoC”). The information contained within this document is intended to provide a minimum level of understanding with regards to the thermal require

模型线

系列: TCI6638K2K (1)

制造商分类

  • Semiconductors> Processors> Other Processors