Datasheet Texas Instruments SN74LVTH32374 — 数据表

制造商Texas Instruments
系列SN74LVTH32374
Datasheet Texas Instruments SN74LVTH32374

具有三态输出的3.3V ABT 32位边沿触发D型触发器

数据表

SN74LVTH32374 datasheet
PDF, 728 Kb, 修订版: D, 档案已发布: Aug 10, 2007
从文件中提取

价格

状态

SN74LVTH32374ZKER
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

打包

SN74LVTH32374ZKER
N1
Pin96
Package TypeZKE
Industry STD TermBGA MICROSTAR
JEDEC CodeR-PBGA-N
Package QTY1000
CarrierLARGE T&R
Device MarkingHV374
Width (mm)5.5
Length (mm)13.5
Thickness (mm).85
Pitch (mm).8
Max Height (mm)1.4
Mechanical Data下载

参数化

Parameters / ModelsSN74LVTH32374ZKER
SN74LVTH32374ZKER
3-State OutputYes
Bits32
F @ Nom Voltage(Max), Mhz160
ICC @ Nom Voltage(Max), mA10
Operating Temperature Range, C-40 to 85
Output Drive (IOL/IOH)(Max), mA64/-32
Package GroupLFBGA
Package Size: mm2:W x L, PKG96LFBGA: 74 mm2: 5.5 x 13.5(LFBGA)
RatingCatalog
Schmitt TriggerNo
Technology FamilyLVT
VCC(Max), V3.6
VCC(Min), V2.7
Voltage(Nom), V3.3
tpd @ Nom Voltage(Max), ns4.5

生态计划

SN74LVTH32374ZKER
RoHSCompliant

应用须知

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, 档案已发布: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
  • Bus-Hold Circuit
    PDF, 418 Kb, 档案已发布: Feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of

模型线

系列: SN74LVTH32374 (1)

制造商分类

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop