Datasheet Texas Instruments SN74LVT182502PM — 数据表

制造商Texas Instruments
系列SN74LVT182502
零件号SN74LVT182502PM
Datasheet Texas Instruments SN74LVT182502PM

具有18位通用总线收发器的3.3V ABT扫描测试设备64-LQFP -40至85

数据表

3.3-V ABT Scan Test Devices With 18-Bit Universal Bus Transceivers (Rev. F)
PDF, 504 Kb, 修订版: F, 档案已发布: Jul 1, 1996

价格

状态

Lifecycle StatusObsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityNo

打包

Pin64
Package TypePM
Industry STD TermLQFP
JEDEC CodeS-PQFP-G
Width (mm)10
Length (mm)10
Thickness (mm)1.4
Pitch (mm).5
Max Height (mm)1.6
Mechanical Data下载

生态计划

RoHSNot Compliant
Pb FreeNo

应用须知

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, 档案已发布: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

模型线

系列: SN74LVT182502 (1)
  • SN74LVT182502PM

制造商分类

  • Semiconductors > Logic > Specialty Logic > Boundary Scan (JTAG) Logic