Datasheet Texas Instruments SN74LVT162244A — 数据表

制造商Texas Instruments
系列SN74LVT162244A
Datasheet Texas Instruments SN74LVT162244A

具有三态输出的3.3V ABT 16位缓冲器/驱动器

数据表

SN54LVT162244A, SN74LVT162244A datasheet
PDF, 934 Kb, 修订版: D, 档案已发布: Dec 1, 2006
从文件中提取

价格

状态

74LVT162244ADGGRE4SN74LVT162244ADGGRSN74LVT162244ADGVRSN74LVT162244ADLSN74LVT162244ADLRSN74LVT162244AGQLRSN74LVT162244AGRDRSN74LVT162244AZQLRSN74LVT162244AZRDR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoYesNoNoNoNoNoNo

打包

74LVT162244ADGGRE4SN74LVT162244ADGGRSN74LVT162244ADGVRSN74LVT162244ADLSN74LVT162244ADLRSN74LVT162244AGQLRSN74LVT162244AGRDRSN74LVT162244AZQLRSN74LVT162244AZRDR
N123456789
Pin484848484856545654
Package TypeDGGDGGDGVDLDLGQLGRDZQLZRD
Industry STD TermTSSOPTSSOPTVSOPSSOPSSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIORBGA MICROSTAR JUNIORBGA MICROSTAR JUNIOR
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PBGA-NR-PBGA-NR-PBGA-NR-PBGA-N
Package QTY20002000200025100010001000
CarrierLARGE T&RLARGE T&RLARGE T&RTUBELARGE T&RLARGE T&RLARGE T&R
Device MarkingLVT162244ALVT162244ALZ244ALVT162244ALVT162244ALZ244ALZ244A
Width (mm)6.16.14.47.497.494.55.54.55.5
Length (mm)12.512.59.715.8815.887878
Thickness (mm)1.151.151.052.592.59.75.8.75.8
Pitch (mm).5.5.4.635.635.65.8.65.8
Max Height (mm)1.21.21.22.792.7911.211.2
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参数化

Parameters / Models74LVT162244ADGGRE4
74LVT162244ADGGRE4
SN74LVT162244ADGGR
SN74LVT162244ADGGR
SN74LVT162244ADGVR
SN74LVT162244ADGVR
SN74LVT162244ADL
SN74LVT162244ADL
SN74LVT162244ADLR
SN74LVT162244ADLR
SN74LVT162244AGQLR
SN74LVT162244AGQLR
SN74LVT162244AGRDR
SN74LVT162244AGRDR
SN74LVT162244AZQLR
SN74LVT162244AZQLR
SN74LVT162244AZRDR
SN74LVT162244AZRDR
Approx. Price (US$)0.71 | 1ku0.71 | 1ku
Bits16161616161616
Bits(#)1616
F @ Nom Voltage(Max), Mhz100100100100100100100
F @ Nom Voltage(Max)(Mhz)100100
ICC @ Nom Voltage(Max), mA0.0050.0050.0050.0050.0050.0050.005
ICC @ Nom Voltage(Max)(mA)0.0050.005
Input TypeTTL/CMOSTTL/CMOS
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA-12/12-12/12-12/12-12/12-12/12-12/12-12/12
Output Drive (IOL/IOH)(Max)(mA)-12/12-12/12
Output TypeLVTTLLVTTL
Package GroupTSSOPTSSOPTVSOPSSOPSSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIORBGA MICROSTAR JUNIORBGA MICROSTAR JUNIOR
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
Package Size: mm2:W x L (PKG)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNo
Technology FamilyLVTLVTLVTLVTLVTLVTLVTLVTLVT
VCC(Max), V3.63.63.63.63.63.63.6
VCC(Max)(V)3.63.6
VCC(Min), V2.72.72.72.72.72.72.7
VCC(Min)(V)2.72.7
Voltage(Nom), V3.33.33.33.33.33.33.3
Voltage(Nom)(V)3.33.3
tpd @ Nom Voltage(Max), ns4444444
tpd @ Nom Voltage(Max)(ns)44

生态计划

74LVT162244ADGGRE4SN74LVT162244ADGGRSN74LVT162244ADGVRSN74LVT162244ADLSN74LVT162244ADLRSN74LVT162244AGQLRSN74LVT162244AGRDRSN74LVT162244AZQLRSN74LVT162244AZRDR
RoHSCompliantCompliantCompliantCompliantCompliantNot CompliantNot CompliantCompliantCompliant
Pb FreeNoNo

应用须知

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, 档案已发布: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
    PDF, 105 Kb, 修订版: A, 档案已发布: Aug 1, 1997
    The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
  • Understanding Advanced Bus-Interface Products Design Guide
    PDF, 253 Kb, 档案已发布: May 1, 1996
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, 档案已发布: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
  • Live Insertion
    PDF, 150 Kb, 档案已发布: Oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, 档案已发布: Oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou

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制造商分类

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver