Datasheet Texas Instruments SN74LS19A — 数据表

制造商Texas Instruments
系列SN74LS19A
Datasheet Texas Instruments SN74LS19A

六路施密特触发器逆变器

数据表

Schmitt-Trigger Positive-NAND Gates And Inverters With Totem-Pole Outputs datasheet
PDF, 896 Kb, 档案已发布: Mar 1, 1988
从文件中提取

价格

状态

SN74LS19ADRSN74LS19ANSN74LS19ANE4SN74LS19ANSR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

打包

SN74LS19ADRSN74LS19ANSN74LS19ANE4SN74LS19ANSR
N1234
Pin14141414
Package TypeDNNNS
Industry STD TermSOICPDIPPDIPSOP
JEDEC CodeR-PDSO-GR-PDIP-TR-PDIP-TR-PDSO-G
Package QTY250025252000
CarrierLARGE T&RTUBETUBELARGE T&R
Device MarkingLS19ASN74LS19ANSN74LS19AN74LS19A
Width (mm)3.916.356.355.3
Length (mm)8.6519.319.310.3
Thickness (mm)1.583.93.91.95
Pitch (mm)1.272.542.541.27
Max Height (mm)1.755.085.082
Mechanical Data下载下载下载下载

参数化

Parameters / ModelsSN74LS19ADR
SN74LS19ADR
SN74LS19AN
SN74LS19AN
SN74LS19ANE4
SN74LS19ANE4
SN74LS19ANSR
SN74LS19ANSR
Bits6666
F @ Nom Voltage(Max), Mhz35353535
ICC @ Nom Voltage(Max), mA0.030.030.030.03
Operating Temperature Range, C0 to 700 to 700 to 700 to 70
Output Drive (IOL/IOH)(Max), mA-0.4/8-0.4/8-0.4/8-0.4/8
Package GroupSOICPDIPPDIPSO
Package Size: mm2:W x L, PKG14SOIC: 52 mm2: 6 x 8.65(SOIC)See datasheet (PDIP)See datasheet (PDIP)14SO: 80 mm2: 7.8 x 10.2(SO)
RatingCatalogCatalogCatalogCatalog
Schmitt TriggerYesYesYesYes
Technology FamilyLSLSLSLS
VCC(Max), V5.255.255.255.25
VCC(Min), V4.754.754.754.75
Voltage(Nom), V5555
tpd @ Nom Voltage(Max), ns30303030

生态计划

SN74LS19ADRSN74LS19ANSN74LS19ANE4SN74LS19ANSR
RoHSCompliantCompliantCompliantCompliant
Pb FreeYesYes

应用须知

  • Designing with the SN54/74LS123 (Rev. A)
    PDF, 118 Kb, 修订版: A, 档案已发布: Mar 1, 1997
    The Texas Instruments (TI) SN54/74LS123 dual retriggerable monostable multivibrator is a one-shot device capable of verylong output pulses and up to 100% duty cycle. The ?LS123 also features dc triggering from gated low-level active A andhigh-level active B inputs and provides a clear input that terminates the output pulse of any predetermined time independentof timing components R ext and

模型线

制造商分类

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Inverting Buffer/Driver