Datasheet Texas Instruments SN74HSTL16918DGGR — 数据表

SN74HSTL16918
9-BIT TO 18-BIT HSTL-TO-LVTTL MEMORY ADDRESS LATCH
SCES096C – APRIL 1997 – REVISED JANUARY 1999 D
D
D
D
D DGG PACKAGE
(TOP VIEW) Member of the Texas Instruments
WidebusпЈЄ Family
Inputs Meet JEDEC HSTL Std JESD 8-6 and
Outputs Meet Level III Specifications
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Packaged in Plastic Thin Shrink
Small-Outline Package 2Q1
1Q1
GND
D1
D2
VCC …