Datasheet Texas Instruments SN74AVCAH164245 — 数据表

制造商Texas Instruments
系列SN74AVCAH164245
Datasheet Texas Instruments SN74AVCAH164245

具有可配置电压转换的16位双电源总线收发器

数据表

SN74AVCAH164245 datasheet
PDF, 857 Kb, 修订版: A, 档案已发布: May 6, 2004
从文件中提取

价格

状态

74AVCAH164245GRE474AVCAH164245GRG474AVCAH164245VRG474AVCAH164245ZQLRSN74AVCAH164245GRSN74AVCAH164245KRSN74AVCAH164245VR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYesYesNoYesYes

打包

74AVCAH164245GRE474AVCAH164245GRG474AVCAH164245VRG474AVCAH164245ZQLRSN74AVCAH164245GRSN74AVCAH164245KRSN74AVCAH164245VR
N1234567
Pin48484856485648
Package TypeDGGDGGDGVZQLDGGGQLDGV
Industry STD TermTSSOPTSSOPTVSOPBGA MICROSTAR JUNIORTSSOPBGA MICROSTAR JUNIORTVSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PBGA-NR-PDSO-GR-PBGA-NR-PDSO-G
Package QTY200020002000100020002000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingAVCAH164245AVCAH164245WAH4245WAH4245AVCAH164245WAH4245
Width (mm)6.16.14.44.56.14.54.4
Length (mm)12.512.59.7712.579.7
Thickness (mm)1.151.151.05.751.15.751.05
Pitch (mm).5.5.4.65.5.65.4
Max Height (mm)1.21.21.211.211.2
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参数化

Parameters / Models74AVCAH164245GRE4
74AVCAH164245GRE4
74AVCAH164245GRG4
74AVCAH164245GRG4
74AVCAH164245VRG4
74AVCAH164245VRG4
74AVCAH164245ZQLR
74AVCAH164245ZQLR
SN74AVCAH164245GR
SN74AVCAH164245GR
SN74AVCAH164245KR
SN74AVCAH164245KR
SN74AVCAH164245VR
SN74AVCAH164245VR
Approx. Price (US$)1.77 | 1ku
Bits161616161616
Bits(#)16
ICCA Static Current, mA0.040.040.040.040.040.04
ICCA Static Current(mA)0.04
ICCB Static Current, mA0.040.040.040.040.040.04
ICCB Static Current(mA)0.04
Operating Temperature Range(C)-40 to 85
Package GroupTSSOPTSSOPTVSOPBGA MICROSTAR JUNIORTSSOPBGA MICROSTAR JUNIORTVSOP
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)
Package Size: mm2:W x L (PKG)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Special FeaturesIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF,Dual Supply,Translation
Static Current, mA0.080.080.080.080.080.08
VCCA(Max), V3.63.63.63.63.63.6
VCCA(Max)(V)3.6
VCCA(Min), V1.41.41.41.41.41.4
VCCA(Min)(V)1.4
VCCB(Max), V3.63.63.63.63.63.6
VCCB(Max)(V)3.6
VCCB(Min), V1.41.41.41.41.41.4
VCCB(Min)(V)1.4

生态计划

74AVCAH164245GRE474AVCAH164245GRG474AVCAH164245VRG474AVCAH164245ZQLRSN74AVCAH164245GRSN74AVCAH164245KRSN74AVCAH164245VR
RoHSCompliantCompliantCompliantCompliantCompliantNot CompliantCompliant
Pb FreeNo

应用须知

  • Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)
    PDF, 126 Kb, 修订版: B, 档案已发布: Jul 7, 1999
    Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i
  • AVC Logic Family Technology and Applications (Rev. A)
    PDF, 148 Kb, 修订版: A, 档案已发布: Aug 26, 1998
    Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control (
  • Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)
    PDF, 390 Kb, 修订版: B, 档案已发布: Apr 30, 2015
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, 修订版: A, 档案已发布: Jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati

模型线

制造商分类

  • Semiconductors> Logic> Voltage Level Translation> Application Specific Voltage Translation