Datasheet Texas Instruments SN74AVC2T45 — 数据表

制造商Texas Instruments
系列SN74AVC2T45
Datasheet Texas Instruments SN74AVC2T45

具有可配置电压转换和三态输出的双位双电源总线收发器

数据表

SN74AVC2T45 2-Bit, Dual Supply, Bus Transceiver With Configurable Level-Shifting and Translation datasheet
PDF, 1.1 Mb, 修订版: L, 档案已发布: May 18, 2017
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价格

状态

SN74AVC2T45DCTRSN74AVC2T45DCTRE4SN74AVC2T45DCTTSN74AVC2T45DCTTG4SN74AVC2T45DCURSN74AVC2T45DCURE4SN74AVC2T45DCURG4SN74AVC2T45DCUTSN74AVC2T45DCUTE4SN74AVC2T45DCUTG4SN74AVC2T45YZPR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoYesNoNoNoYesNoNoNoYes

打包

SN74AVC2T45DCTRSN74AVC2T45DCTRE4SN74AVC2T45DCTTSN74AVC2T45DCTTG4SN74AVC2T45DCURSN74AVC2T45DCURE4SN74AVC2T45DCURG4SN74AVC2T45DCUTSN74AVC2T45DCUTE4SN74AVC2T45DCUTG4SN74AVC2T45YZPR
N1234567891011
Pin88888888888
Package TypeDCTDCTDCTDCTDCUDCUDCUDCUDCUDCUYZP
Industry STD TermSSOPSSOPSSOPSSOPVSSOPVSSOPVSSOPVSSOPVSSOPVSSOPDSBGA
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-XBGA-N
Package QTY30003000250250300030002502503000
CarrierLARGE T&RLARGE T&RSMALL T&RSMALL T&RLARGE T&RLARGE T&RSMALL T&RSMALL T&RLARGE T&R
Device MarkingZZDT2DT2T2DT2RDT2RDT2RTD7
Width (mm)2.82.82.82.82222222.25
Length (mm)2.952.952.952.952.32.32.32.32.32.31.25
Thickness (mm)1.291.291.291.29.85.85.85.85.85.85.31
Pitch (mm).65.65.65.65.5.5.5.5.5.5.5
Max Height (mm)1.31.31.31.3.9.9.9.9.9.9.5
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参数化

Parameters / ModelsSN74AVC2T45DCTR
SN74AVC2T45DCTR
SN74AVC2T45DCTRE4
SN74AVC2T45DCTRE4
SN74AVC2T45DCTT
SN74AVC2T45DCTT
SN74AVC2T45DCTTG4
SN74AVC2T45DCTTG4
SN74AVC2T45DCUR
SN74AVC2T45DCUR
SN74AVC2T45DCURE4
SN74AVC2T45DCURE4
SN74AVC2T45DCURG4
SN74AVC2T45DCURG4
SN74AVC2T45DCUT
SN74AVC2T45DCUT
SN74AVC2T45DCUTE4
SN74AVC2T45DCUTE4
SN74AVC2T45DCUTG4
SN74AVC2T45DCUTG4
SN74AVC2T45YZPR
SN74AVC2T45YZPR
3-State OutputYesYesYesYesYesYesYesYesYesYesYes
Approx. Price (US$)0.23 | 1ku0.23 | 1ku
Bits222222222
Bits(#)22
F @ Nom Voltage(Max), Mhz100100100100100100100100100
F @ Nom Voltage(Max)(Mhz)100100
Gate TypeTRANSCEIVERTRANSCEIVERTRANSCEIVERTRANSCEIVERTRANSCEIVERTRANSCEIVERTRANSCEIVERTRANSCEIVERTRANSCEIVERTRANSCEIVERTRANSCEIVER
ICC @ Nom Voltage(Max), mA0.00080.00080.00080.00080.00080.00080.00080.00080.0008
ICC @ Nom Voltage(Max)(mA)0.00080.0008
LogicTrueTrueTrueTrueTrueTrueTrueTrueTrueTrueTrue
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA12/-1212/-1212/-1212/-1212/-1212/-1212/-1212/-1212/-12
Output Drive (IOL/IOH)(Max)(mA)12/-1212/-12
Package GroupSM8SM8SM8SM8VSSOPVSSOPVSSOPVSSOPVSSOPVSSOPDSBGA
Package Size: mm2:W x L, PKG8SM8: 12 mm2: 4 x 2.95(SM8)8SM8: 12 mm2: 4 x 2.95(SM8)8SM8: 12 mm2: 4 x 2.95(SM8)8SM8: 12 mm2: 4 x 2.95(SM8)8VSSOP: 6 mm2: 3.1 x 2(VSSOP)8VSSOP: 6 mm2: 3.1 x 2(VSSOP)8VSSOP: 6 mm2: 3.1 x 2(VSSOP)8VSSOP: 6 mm2: 3.1 x 2(VSSOP)See datasheet (DSBGA)
Package Size: mm2:W x L (PKG)See datasheet (DSBGA)See datasheet (DSBGA)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNoNoNo
Special FeaturesIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF
Dual Supply
Translation
IOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF
Dual Supply
Translation
IOFF,Dual Supply,TranslationIOFF,Dual Supply,Translation
Sub-FamilyDual Supply TranslatorDual Supply TranslatorDual Supply TranslatorDual Supply TranslatorDual Supply TranslatorDual Supply TranslatorDual Supply TranslatorDual Supply TranslatorDual Supply TranslatorDual Supply TranslatorDual Supply Translator
Technology FamilyAVCAVCAVCAVCAVCAVCAVCAVCAVCAVCAVC
VCC(Max), V3.63.63.63.63.63.63.63.63.6
VCC(Max)(V)3.63.6
VCC(Min), V1.21.21.21.21.21.21.21.21.2
VCC(Min)(V)1.21.2
Voltage(Nom), V1.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.3
Voltage(Nom)(V)1.2
1.5
1.8
2.5
3.3
1.2
1.5
1.8
2.5
3.3
tpd @ Nom Voltage(Max), ns3.1,2.6,2.4,2.23.1,2.6,2.4,2.23.1,2.6,2.4,2.23.1,2.6,2.4,2.23.1,2.6,2.4,2.23.1,2.6,2.4,2.23.1,2.6,2.4,2.23.1,2.6,2.4,2.23.1,2.6,2.4,2.2
tpd @ Nom Voltage(Max)(ns)3.1
2.6
2.4
2.2
3.1
2.6
2.4
2.2

生态计划

SN74AVC2T45DCTRSN74AVC2T45DCTRE4SN74AVC2T45DCTTSN74AVC2T45DCTTG4SN74AVC2T45DCURSN74AVC2T45DCURE4SN74AVC2T45DCURG4SN74AVC2T45DCUTSN74AVC2T45DCUTE4SN74AVC2T45DCUTG4SN74AVC2T45YZPR
RoHSCompliantCompliantCompliantCompliantCompliantNot CompliantCompliantCompliantNot CompliantCompliantCompliant
Pb FreeNoNo

应用须知

  • Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)
    PDF, 126 Kb, 修订版: B, 档案已发布: Jul 7, 1999
    Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i
  • AVC Logic Family Technology and Applications (Rev. A)
    PDF, 148 Kb, 修订版: A, 档案已发布: Aug 26, 1998
    Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control (
  • Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)
    PDF, 390 Kb, 修订版: B, 档案已发布: Apr 30, 2015
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa

模型线

制造商分类

  • Semiconductors> Logic> Little Logic