Datasheet Texas Instruments SN74ALVTH16374 — 数据表

制造商Texas Instruments
系列SN74ALVTH16374
Datasheet Texas Instruments SN74ALVTH16374

具有三态输出的2.5V / 3.3V 16位边沿触发D类触发器

数据表

SN54ALVTH16374, SN74ALVTH16374 datasheet
PDF, 928 Kb, 修订版: G, 档案已发布: Nov 9, 2006
从文件中提取

价格

状态

74ALVTH16374ZQLRSN74ALVTH16374DLSN74ALVTH16374DLRSN74ALVTH16374GRSN74ALVTH16374KRSN74ALVTH16374VR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNo

打包

74ALVTH16374ZQLRSN74ALVTH16374DLSN74ALVTH16374DLRSN74ALVTH16374GRSN74ALVTH16374KRSN74ALVTH16374VR
N123456
Pin564848485648
Package TypeZQLDLDLDGGGQLDGV
Industry STD TermBGA MICROSTAR JUNIORSSOPSSOPTSSOPBGA MICROSTAR JUNIORTVSOP
JEDEC CodeR-PBGA-NR-PDSO-GR-PDSO-GR-PDSO-GR-PBGA-NR-PDSO-G
Package QTY100025100020002000
CarrierLARGE T&RTUBELARGE T&RLARGE T&RLARGE T&R
Device MarkingVT374ALVTH16374ALVTH16374ALVTH16374VT374
Width (mm)4.57.497.496.14.54.4
Length (mm)715.8815.8812.579.7
Thickness (mm).752.592.591.15.751.05
Pitch (mm).65.635.635.5.65.4
Max Height (mm)12.792.791.211.2
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参数化

Parameters / Models74ALVTH16374ZQLR
74ALVTH16374ZQLR
SN74ALVTH16374DL
SN74ALVTH16374DL
SN74ALVTH16374DLR
SN74ALVTH16374DLR
SN74ALVTH16374GR
SN74ALVTH16374GR
SN74ALVTH16374KR
SN74ALVTH16374KR
SN74ALVTH16374VR
SN74ALVTH16374VR
3-State OutputYesYesYesYesYesYes
Approx. Price (US$)0.59 | 1ku
Bits1616161616
Bits(#)16
F @ Nom Voltage(Max), Mhz250250250250250
F @ Nom Voltage(Max)(Mhz)250
ICC @ Nom Voltage(Max), mA55555
ICC @ Nom Voltage(Max)(mA)5
Input TypeTTL
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max), mA64/-3264/-3264/-3264/-3264/-32
Output Drive (IOL/IOH)(Max)(mA)64/-32
Output TypeTTL
Package GroupBGA MICROSTAR JUNIORSSOPSSOPTSSOPBGA MICROSTAR JUNIORTVSOP
Package Size: mm2:W x L, PKG56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)
Package Size: mm2:W x L (PKG)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNo
Technology FamilyALVTALVTALVTALVTALVTALVT
VCC(Max), V3.63.63.63.63.6
VCC(Max)(V)3.6
VCC(Min), V2.32.32.32.32.3
VCC(Min)(V)2.3
Voltage(Nom), V2.5,3.32.5,3.32.5,3.32.5,3.32.5,3.3
Voltage(Nom)(V)2.5
3.3
tpd @ Nom Voltage(Max), ns3.8,3.23.8,3.23.8,3.23.8,3.23.8,3.2
tpd @ Nom Voltage(Max)(ns)3.8
3.2

生态计划

74ALVTH16374ZQLRSN74ALVTH16374DLSN74ALVTH16374DLRSN74ALVTH16374GRSN74ALVTH16374KRSN74ALVTH16374VR
RoHSCompliantCompliantCompliantCompliantNot CompliantCompliant
Pb FreeNo

应用须知

  • Advanced Low-Voltage Technology
    PDF, 59 Kb, 档案已发布: Jul 27, 1999
    ALVT, the advanced low-voltage logic family, offers high-performance BiCMOS devices that are functional at 3.3-V and 2.5-V V sub CC and have low propagation delay, low static-power consumption, and 64 mA current drive. Other features include 5-V tolerance; auto3-state; bus hold; partial power down, hot insertion, and live insertion; and excellent simultaneous-switching and output-skew performance.
  • Bus-Hold Circuit
    PDF, 418 Kb, 档案已发布: Feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, 档案已发布: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Kb, 修订版: A, 档案已发布: Sep 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, 修订版: A, 档案已发布: Feb 6, 2015

模型线

制造商分类

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop