Datasheet Texas Instruments SN74ALVTH16245 — 数据表

制造商Texas Instruments
系列SN74ALVTH16245
Datasheet Texas Instruments SN74ALVTH16245

具有三态输出的2.5V / 3.3V 16位总线收发器

数据表

2.5-V/3.3-V 16-Bit Bus Transceivers With 3-State Outputs datasheet
PDF, 939 Kb, 修订版: G, 档案已发布: Apr 4, 2002
从文件中提取

价格

状态

74ALVTH16245GRE474ALVTH16245VRG474ALVTH16245ZQLRSN74ALVTH16245DLSN74ALVTH16245DLRSN74ALVTH16245GRSN74ALVTH16245KRSN74ALVTH16245VR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNo

打包

74ALVTH16245GRE474ALVTH16245VRG474ALVTH16245ZQLRSN74ALVTH16245DLSN74ALVTH16245DLRSN74ALVTH16245GRSN74ALVTH16245KRSN74ALVTH16245VR
N12345678
Pin4848564848485648
Package TypeDGGDGVZQLDLDLDGGGQLDGV
Industry STD TermTSSOPTVSOPBGA MICROSTAR JUNIORSSOPSSOPTSSOPBGA MICROSTAR JUNIORTVSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PBGA-NR-PDSO-GR-PDSO-GR-PDSO-GR-PBGA-NR-PDSO-G
Package QTY20002000100025100020002000
CarrierLARGE T&RLARGE T&RLARGE T&RTUBELARGE T&RLARGE T&RLARGE T&R
Device MarkingALVTH16245VT245VT245ALVTH16245ALVTH16245ALVTH16245VT245
Width (mm)6.14.44.57.497.496.14.54.4
Length (mm)12.59.7715.8815.8812.579.7
Thickness (mm)1.151.05.752.592.591.15.751.05
Pitch (mm).5.4.65.635.635.5.65.4
Max Height (mm)1.21.212.792.791.211.2
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参数化

Parameters / Models74ALVTH16245GRE4
74ALVTH16245GRE4
74ALVTH16245VRG4
74ALVTH16245VRG4
74ALVTH16245ZQLR
74ALVTH16245ZQLR
SN74ALVTH16245DL
SN74ALVTH16245DL
SN74ALVTH16245DLR
SN74ALVTH16245DLR
SN74ALVTH16245GR
SN74ALVTH16245GR
SN74ALVTH16245KR
SN74ALVTH16245KR
SN74ALVTH16245VR
SN74ALVTH16245VR
Approx. Price (US$)0.52 | 1ku
Bits16161616161616
Bits(#)16
F @ Nom Voltage(Max), Mhz25252525252525
F @ Nom Voltage(Max)(Mhz)25
ICC @ Nom Voltage(Max), mA5555555
ICC @ Nom Voltage(Max)(mA)5
Input TypeTTL
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max), mA-32/64-32/64-32/64-32/64-32/64-32/64-32/64
Output Drive (IOL/IOH)(Max)(mA)-32/64
Output TypeTTL
Package GroupTSSOPTVSOPBGA MICROSTAR JUNIORSSOPSSOPTSSOPBGA MICROSTAR JUNIORTVSOP
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)
Package Size: mm2:W x L (PKG)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNo
Technology FamilyALVTALVTALVTALVTALVTALVTALVTALVT
VCC(Max), V3.63.63.63.63.63.63.6
VCC(Max)(V)3.6
VCC(Min), V2.32.32.32.32.32.32.3
VCC(Min)(V)2.3
Voltage(Nom), V2.5,3.32.5,3.32.5,3.32.5,3.32.5,3.32.5,3.32.5,3.3
Voltage(Nom)(V)2.5
3.3
tpd @ Nom Voltage(Max), ns3.6,3.13.6,3.13.6,3.13.6,3.13.6,3.13.6,3.13.6,3.1
tpd @ Nom Voltage(Max)(ns)3.6
3.1

生态计划

74ALVTH16245GRE474ALVTH16245VRG474ALVTH16245ZQLRSN74ALVTH16245DLSN74ALVTH16245DLRSN74ALVTH16245GRSN74ALVTH16245KRSN74ALVTH16245VR
RoHSCompliantCompliantCompliantCompliantCompliantCompliantNot CompliantCompliant
Pb FreeNo

应用须知

  • Advanced Low-Voltage Technology
    PDF, 59 Kb, 档案已发布: Jul 27, 1999
    ALVT, the advanced low-voltage logic family, offers high-performance BiCMOS devices that are functional at 3.3-V and 2.5-V V sub CC and have low propagation delay, low static-power consumption, and 64 mA current drive. Other features include 5-V tolerance; auto3-state; bus hold; partial power down, hot insertion, and live insertion; and excellent simultaneous-switching and output-skew performance.
  • Bus-Hold Circuit
    PDF, 418 Kb, 档案已发布: Feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, 档案已发布: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Kb, 修订版: A, 档案已发布: Sep 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families

模型线

制造商分类

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Standard Transceiver