Datasheet Texas Instruments SN74ALVTH16244 — 数据表

制造商Texas Instruments
系列SN74ALVTH16244
Datasheet Texas Instruments SN74ALVTH16244

具有三态输出的2.5V / 3.3V 16位缓冲器/驱动器

数据表

2.5-V/3.3-V 16-Bit Buffers/Drivers With 3-State Outputs datasheet
PDF, 807 Kb, 修订版: G, 档案已发布: May 21, 1999
从文件中提取

价格

状态

74ALVTH16244DLRG474ALVTH16244GRE474ALVTH16244GRG474ALVTH16244VRE4SN74ALVTH16244DLSN74ALVTH16244DLRSN74ALVTH16244GRSN74ALVTH16244VR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNo

打包

74ALVTH16244DLRG474ALVTH16244GRE474ALVTH16244GRG474ALVTH16244VRE4SN74ALVTH16244DLSN74ALVTH16244DLRSN74ALVTH16244GRSN74ALVTH16244VR
N12345678
Pin4848484848484848
Package TypeDLDGGDGGDGVDLDLDGGDGV
Industry STD TermSSOPTSSOPTSSOPTVSOPSSOPSSOPTSSOPTVSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY100020002000200025100020002000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&RTUBELARGE T&RLARGE T&RLARGE T&R
Device MarkingALVTH16244ALVTH16244ALVTH16244VT244ALVTH16244ALVTH16244ALVTH16244VT244
Width (mm)7.496.16.14.47.497.496.14.4
Length (mm)15.8812.512.59.715.8815.8812.59.7
Thickness (mm)2.591.151.151.052.592.591.151.05
Pitch (mm).635.5.5.4.635.635.5.4
Max Height (mm)2.791.21.21.22.792.791.21.2
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参数化

Parameters / Models74ALVTH16244DLRG4
74ALVTH16244DLRG4
74ALVTH16244GRE4
74ALVTH16244GRE4
74ALVTH16244GRG4
74ALVTH16244GRG4
74ALVTH16244VRE4
74ALVTH16244VRE4
SN74ALVTH16244DL
SN74ALVTH16244DL
SN74ALVTH16244DLR
SN74ALVTH16244DLR
SN74ALVTH16244GR
SN74ALVTH16244GR
SN74ALVTH16244VR
SN74ALVTH16244VR
Bits1616161616161616
F @ Nom Voltage(Max), Mhz100100100100100100100100
ICC @ Nom Voltage(Max), mA55555555
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA-24/24-24/24-24/24-24/24-24/24-24/24-24/24-24/24
Package GroupSSOPTSSOPTSSOPTVSOPSSOPSSOPTSSOPTVSOP
Package Size: mm2:W x L, PKG48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNo
Technology FamilyALVTALVTALVTALVTALVTALVTALVTALVT
VCC(Max), V3.63.63.63.63.63.63.63.6
VCC(Min), V2.32.32.32.32.32.32.32.3
Voltage(Nom), V2.5,3.32.5,3.32.5,3.32.5,3.32.5,3.32.5,3.32.5,3.32.5,3.3
tpd @ Nom Voltage(Max), ns3,2.43,2.43,2.43,2.43,2.43,2.43,2.43,2.4

生态计划

74ALVTH16244DLRG474ALVTH16244GRE474ALVTH16244GRG474ALVTH16244VRE4SN74ALVTH16244DLSN74ALVTH16244DLRSN74ALVTH16244GRSN74ALVTH16244VR
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • Advanced Low-Voltage Technology
    PDF, 59 Kb, 档案已发布: Jul 27, 1999
    ALVT, the advanced low-voltage logic family, offers high-performance BiCMOS devices that are functional at 3.3-V and 2.5-V V sub CC and have low propagation delay, low static-power consumption, and 64 mA current drive. Other features include 5-V tolerance; auto3-state; bus hold; partial power down, hot insertion, and live insertion; and excellent simultaneous-switching and output-skew performance.
  • Bus-Hold Circuit
    PDF, 418 Kb, 档案已发布: Feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, 档案已发布: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Kb, 修订版: A, 档案已发布: Sep 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families

模型线

制造商分类

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver