Datasheet Texas Instruments SN74ALVC32 — 数据表

制造商Texas Instruments
系列SN74ALVC32
Datasheet Texas Instruments SN74ALVC32

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数据表

SN74ALVC32 datasheet
PDF, 653 Kb, 修订版: G, 档案已发布: Apr 28, 2004
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价格

状态

SN74ALVC32DSN74ALVC32DG4SN74ALVC32DGVRSN74ALVC32DRSN74ALVC32NSRSN74ALVC32PWSN74ALVC32PWE4SN74ALVC32PWG4SN74ALVC32PWRSN74ALVC32PWRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNoNo

打包

SN74ALVC32DSN74ALVC32DG4SN74ALVC32DGVRSN74ALVC32DRSN74ALVC32NSRSN74ALVC32PWSN74ALVC32PWE4SN74ALVC32PWG4SN74ALVC32PWRSN74ALVC32PWRG4
N12345678910
Pin14141414141414141414
Package TypeDDDGVDNSPWPWPWPWPW
Industry STD TermSOICSOICTVSOPSOICSOPTSSOPTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY505020002500200090909020002000
CarrierTUBETUBELARGE T&RLARGE T&RLARGE T&RTUBETUBETUBELARGE T&RLARGE T&R
Device MarkingALVC32ALVC32VA32ALVC32ALVC32VA32VA32VA32VA32VA32
Width (mm)3.913.914.43.915.34.44.44.44.44.4
Length (mm)8.658.653.68.6510.355555
Thickness (mm)1.581.581.051.581.9511111
Pitch (mm)1.271.27.41.271.27.65.65.65.65.65
Max Height (mm)1.751.751.21.7521.21.21.21.21.2
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参数化

Parameters / ModelsSN74ALVC32D
SN74ALVC32D
SN74ALVC32DG4
SN74ALVC32DG4
SN74ALVC32DGVR
SN74ALVC32DGVR
SN74ALVC32DR
SN74ALVC32DR
SN74ALVC32NSR
SN74ALVC32NSR
SN74ALVC32PW
SN74ALVC32PW
SN74ALVC32PWE4
SN74ALVC32PWE4
SN74ALVC32PWG4
SN74ALVC32PWG4
SN74ALVC32PWR
SN74ALVC32PWR
SN74ALVC32PWRG4
SN74ALVC32PWRG4
Bits4444444444
F @ Nom Voltage(Max), Mhz100100100100100100100100100100
ICC @ Nom Voltage(Max), mA0.010.010.010.010.010.010.010.010.010.01
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-24
Package GroupSOICSOICTVSOPSOICSOTSSOPTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14TVSOP: 23 mm2: 6.4 x 3.6(TVSOP)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SO: 80 mm2: 7.8 x 10.2(SO)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNoNo
Technology FamilyALVCALVCALVCALVCALVCALVCALVCALVCALVCALVC
VCC(Max), V3.63.63.63.63.63.63.63.63.63.6
VCC(Min), V1.651.651.651.651.651.651.651.651.651.65
Voltage(Nom), V1.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.3
tpd @ Nom Voltage(Max), ns4.7,3.1,2.9,2.84.7,3.1,2.9,2.84.7,3.1,2.9,2.84.7,3.1,2.9,2.84.7,3.1,2.9,2.84.7,3.1,2.9,2.84.7,3.1,2.9,2.84.7,3.1,2.9,2.84.7,3.1,2.9,2.84.7,3.1,2.9,2.8

生态计划

SN74ALVC32DSN74ALVC32DG4SN74ALVC32DGVRSN74ALVC32DRSN74ALVC32NSRSN74ALVC32PWSN74ALVC32PWE4SN74ALVC32PWG4SN74ALVC32PWRSN74ALVC32PWRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • TI SN74ALVC16835 Component Specification Analysis for PC100
    PDF, 43 Kb, 档案已发布: Aug 3, 1998
    The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
  • Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
    PDF, 96 Kb, 修订版: A, 档案已发布: May 13, 1998
    Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Kb, 修订版: A, 档案已发布: Sep 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families

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制造商分类

  • Semiconductors> Logic> Gate> OR Gate