Datasheet Texas Instruments SN74ACT3622-20PQ — 数据表

制造商Texas Instruments
系列SN74ACT3622
零件号SN74ACT3622-20PQ

256 x 36 x 2双向同步FIFO存储器132-BQFP 0至70

数据表

256 X 36 X 2 Clocked Bidirectional First-In, First-Out Memory (Rev. D)
PDF, 507 Kb, 修订版: D, 档案已发布: Apr 1, 1998

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin132
Package TypePQ
Industry STD TermBQFP
JEDEC CodeS-PQFP-G
Package QTY36
CarrierJEDEC TRAY (10+1)
Device MarkingACT3622-20
Width (mm)24.13
Length (mm)27.44
Thickness (mm)3.56
Pitch (mm).635
Max Height (mm)4.57
Mechanical Data下载

生态计划

RoHSCompliant
Pb FreeYes

应用须知

  • Power-Dissipation Calculations for TI FIFO Products (Rev. A)
    PDF, 106 Kb, 修订版: A, 档案已发布: Mar 1, 1996
    Low power consumption is a major advantage of TI FIFO products. Power calculations are required to meet design requirements for chip temperature and system power. This document assists component and system designers in evaluating power consumption for the ACT and ABT FIFO products. Two examples of power calculations, one for the SN74ACT3632 bi-directional CMOS FIFO and one for the BiCMOS SN74ABT36
  • FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control (Rev. A)
    PDF, 65 Kb, 修订版: A, 档案已发布: Mar 1, 1996
    The TI 32- and 36-bit FIFOs contain mailbox-bypass registers that transmit priority from one FIFO port to the other, port A to B or port B to A with out storing the data in the FIFO SRAM buffer. This document describes the FIFO mailbox-bypass registers and shows an example of direct memory access (DMA) control of a digital signal processor (DSP). The components described are the SN74ACT3641 and th

模型线

系列: SN74ACT3622 (2)

制造商分类

  • Semiconductors > Logic > Flip-Flop/Latch/Register > FIFO Register

其他名称:

SN74ACT362220PQ, SN74ACT3622 20PQ