Datasheet Texas Instruments OPA690 — 数据表

制造商Texas Instruments
系列OPA690
Datasheet Texas Instruments OPA690

禁用的宽带电压反馈运算放大器

数据表

OPA690 Wideband, Voltage-Feedback Operational Amplifier With Disable datasheet
PDF, 1.4 Mb, 修订版: G, 档案已发布: Aug 10, 2016
从文件中提取

价格

状态

OPA690IDOPA690IDBVROPA690IDBVRG4OPA690IDBVTOPA690IDBVTG4OPA690IDG4OPA690IDROPA690IDRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYesNoNoYesNoNo

打包

OPA690IDOPA690IDBVROPA690IDBVRG4OPA690IDBVTOPA690IDBVTG4OPA690IDG4OPA690IDROPA690IDRG4
N12345678
Pin86666888
Package TypeDDBVDBVDBVDBVDDD
Industry STD TermSOICSOT-23SOT-23SOT-23SOT-23SOICSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY75300030002502507525002500
CarrierTUBELARGE T&RLARGE T&RSMALL T&RSMALL T&RTUBELARGE T&RLARGE T&R
Device MarkingOPAOAEIOAEIOAEIOAEIOPAOPAOPA
Width (mm)3.911.61.61.61.63.913.913.91
Length (mm)4.92.92.92.92.94.94.94.9
Thickness (mm)1.581.21.21.21.21.581.581.58
Pitch (mm)1.27.95.95.95.951.271.271.27
Max Height (mm)1.751.451.451.451.451.751.751.75
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参数化

Parameters / ModelsOPA690ID
OPA690ID
OPA690IDBVR
OPA690IDBVR
OPA690IDBVRG4
OPA690IDBVRG4
OPA690IDBVT
OPA690IDBVT
OPA690IDBVTG4
OPA690IDBVTG4
OPA690IDG4
OPA690IDG4
OPA690IDR
OPA690IDR
OPA690IDRG4
OPA690IDRG4
2nd Harmonic, dBc6868686868686868
3rd Harmonic, dBc7070707070707070
@ MHz55555555
Acl, min spec gain, V/V11111111
Additional FeaturesShutdownShutdownShutdownShutdownShutdownShutdownShutdownShutdown
ArchitectureBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FB
BW @ Acl, MHz500500500500500500500500
CMRR(Min), dB6060606060606060
CMRR(Typ), dB6565656565656565
GBW(Typ), MHz500500500500500500500500
Input Bias Current(Max), pA1000000010000000100000001000000010000000100000001000000010000000
Iq per channel(Max), mA5.85.85.85.85.85.85.85.8
Iq per channel(Typ), mA5.55.55.55.55.55.55.55.5
Number of Channels11111111
Offset Drift(Typ), uV/C1010101010101010
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Current(Typ), mA190190190190190190190190
Package GroupSOICSOT-23SOT-23SOT-23SOT-23SOICSOICSOIC
Package Size: mm2:W x L, PKG8SOIC: 29 mm2: 6 x 4.9(SOIC)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)
Rail-to-RailNoNoNoNoNoNoNoNo
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Slew Rate(Typ), V/us18001800180018001800180018001800
Total Supply Voltage(Max), +5V=5, +/-5V=101212121212121212
Total Supply Voltage(Min), +5V=5, +/-5V=1055555555
Vn at 1kHz(Typ), nV/rtHz5.55.55.55.55.55.55.55.5
Vn at Flatband(Typ), nV/rtHz5.55.55.55.55.55.55.55.5
Vos (Offset Voltage @ 25C)(Max), mV44444444

生态计划

OPA690IDOPA690IDBVROPA690IDBVRG4OPA690IDBVTOPA690IDBVTG4OPA690IDG4OPA690IDROPA690IDRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • A Numerical Solution to an Analog Problem
    PDF, 210 Kb, 档案已发布: Apr 25, 2010
    In order to derive a solution for an analog circuit problem, it is often useful to develop a model. This approach is generally accepted as developing an analytical model. However, finding the analytical solution is not always practical or possible as a result of higher-degree polynomials that require further resolution, or because of the time needed to develop the solution completely. In these sit
  • RLC Filter Design for ADC Interface Applications (Rev. A)
    PDF, 299 Kb, 修订版: A, 档案已发布: May 13, 2015
    As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD
  • ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers
    PDF, 273 Kb, 档案已发布: Apr 22, 2004
    Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation
  • Measuring Board Parasitics in High-Speed Analog Design
    PDF, 134 Kb, 档案已发布: Jul 7, 2003
    Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

模型线

制造商分类

  • Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> High-Speed Op Amps (>=50MHz)