Datasheet Texas Instruments DS92LV1021AMSAX/NOPB — 数据表

DS92LV1021A
www.ti.com SNLS151G – OCTOBER 2002 – REVISED APRIL 2013 DS92LV1021A 16-40 MHz 10 Bit Bus LVDS Serializer
Check for Samples: DS92LV1021A FEATURES DESCRIPTION The DS92LV1021A transforms a 10-bit wide parallel
LVCMOS/LVTTL data bus into a single high speed
Bus LVDS serial data stream with embedded clock.
The DS92LV1021A can transmit data over
backplanes or cable. The single differential pair data
path makes PCB design easier. In addition, the
reduced cable, PCB trace count, and connector size
tremendously reduce cost. Since one output transmits
both clock and data bits serially, it eliminates clock-todata and data-to-data skew. The powerdown pin
saves power by reducing supply current when the
device is not being used. Upon power up of the
Serializer, you can choose to activate synchronization
mode or use one of TI’s Deserializers in the
synchronization-to-random-data feature. By using the
synchronization mode, the Deserializer will establish
lock to a signal within specified lock times. In
addition, the embedded clock specifies a transition on
the bus every 12-bit cycle. This eliminates
transmission errors due to charged cable conditions.
Furthermore, you may put the DS92LV1021A output
pins into TRI-STATE to achieve a high impedance …