Datasheet Texas Instruments DS25BR101TSDE/NOPB — 数据表

DS25BR100
www.ti.com SNLS217F – MARCH 2007 – REVISED APRIL 2013 DS25BR100 / DS25BR101 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and
Receive Equalization
Check for Samples: DS25BR100 FEATURES DESCRIPTION The DS25BR100 and DS25BR101 are single channel
3.125 Gbps LVDS buffers optimized for high-speed
signal transmission over lossy FR-4 printed circuit
board backplanes and balanced metallic cables. Fully
differential signal paths ensure exceptional signal
integrity and noise immunity. 1 2 DC -3.125 Gbps Low Jitter, High Noise
Immunity, Low Power Operation
Receive Equalization Reduces ISI Jitter Due to
Media Loss
Transmit Pre-Emphasis Drives Lossy
Backplanes and Cables
On-Chip 100Ω Input and Output Termination:
– Minimizes Insertion and Return Losses
– Reduces Component Count
– Minimizes Board Space
DS25BR101 Eliminates On-Chip Input
Termination for Added Design Flexibility
7 kV ESD on LVDS I/O Pins Protects Adjoining
Components
Small 3 mm x 3 mm WSON-8 Space Saving …