Datasheet Texas Instruments DP83867CRRGZR — 数据表

制造商Texas Instruments
系列DP83867CR
零件号DP83867CRRGZR
Datasheet Texas Instruments DP83867CRRGZR

低功耗和小封装千兆位以太网PHY 48-VQFN 0至70

数据表

DP83867IR/CR Robust, High Immunity 10/100/1000 Ethernet Physical Layer Transceiver datasheet
PDF, 1.7 Mb, 修订版: E, 档案已发布: Mar 14, 2017
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

打包

Pin48
Package TypeRGZ
Industry STD TermVQFN
JEDEC CodeS-PQFP-N
Package QTY2500
CarrierLARGE T&R
Device MarkingDP83867CR
Width (mm)7
Length (mm)7
Thickness (mm).9
Pitch (mm).5
Max Height (mm)1
Mechanical Data下载

参数化

Cable Length130 m
Datarate10/100/1000 Mbps
FunctionPHY
InterfaceRGMII
JTAG1149.1Yes
Operating Temperature Range0 to 70 C
Package GroupVQFN
Package Size: mm2:W x L48VQFN: 49 mm2: 7 x 7(VQFN) PKG
Port CountSingle
RatingCatalog
Special FeaturesCable Diagnostics,IEEE 1588 SOF
Supply Voltage1,2.5 Volt

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: DP83867ERGZ-R-EVM
    DP83867ERGZ RGMII 1000M/100M/10M Ethernet PHY Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Importance of Latency in Factory Automation
    PDF, 196 Kb, 档案已发布: Oct 25, 2015
    Latency is a critical parameter in Ethernet networks developed for Factory Automation applications. Latency is not a defined value for Ethernet as specified by the IEEE 802.3 standard. Nor is Ethernet inherently synchronous or repeatable. This disconnect between the inherent characteristics of Ethernet and the needs of Factory Automation applications must be bridged though care
  • RGMII Interface Timing Budgets
    PDF, 185 Kb, 档案已发布: Oct 28, 2015
    RGMII Interface Timing Budgets is intended to serve as a guideline for developing a timing budget when using the RGMII v1.3 and v2.0 standard with a Gigabit PHY transceiver like the DP83867.
  • DP83867 Troubleshooting Guide (Rev. A)
    PDF, 700 Kb, 修订版: A, 档案已发布: Apr 6, 2016
    A 10/100/1000 Ethernet Physical Layer device has multiple connections and many possible configurationoptions. While the DP83867 is designed with a priority on ease of use, there are many factors to considerduring initial board bring up. This application note provides guidance on the key criteria to verify in order toexpedite initial validation of DP83867 applications.
  • DP83867E/IS/CS/IR/CR RGZ Power Consumption Data
    PDF, 92 Kb, 档案已发布: Oct 7, 2015
    Power consumption on an Ethernet PHY is affected by different operating conditions. System design around Ethernet products requires accurate power consumption numbers for component selection, thermal management and power distribution planning. This application report details power consumption of DP83867 in different conditions.
  • How to Configure DP83867 Start of Frame
    PDF, 78 Kb, 档案已发布: Oct 27, 2015
    The DP83867 can detect a Start of Frame Delimiter (SFD) for transmit and receive packets and output a pulse via a GPIO that can be used to assess the latency of the link between the DP83867 and a timestamp capable partner. For real-time systems and systems implementing the IEEE 1588 Precision Time Protocol (PTP) to timestamp packets for synchronizing devices across the network,
  • How to Configure DP838XX for Ethernet Compliance and Loopback Testing (Rev. A)
    PDF, 820 Kb, 修订版: A, 档案已发布: Jan 31, 2017
    This application report covers how to setup and configure the DP838xx PHY (using the customer EVM) forEthernet Physical Layer Compliance (IEEE 802.3) testing as the device under test (DUT). This applicationnote primarily uses DP83867 as an example, but any DP838xx can use these procedures for compliancetesting.Refer to DP83822 IEEE 802.3u Compliance and Debug (SNLA266) for a DP83822 specif

模型线

系列: DP83867CR (2)

制造商分类

  • Semiconductors > Interface > Ethernet > Ethernet PHY