Datasheet Texas Instruments DAC5675A-SP — 数据表

制造商Texas Instruments
系列DAC5675A-SP
Datasheet Texas Instruments DAC5675A-SP

V类,14位,400 MSPS数模转换器

数据表

DAC5675A-SP Radiation-Tolerant, 14-Bit, 400-MSPS Digital-to-Analog Converter datasheet
PDF, 818 Kb, 修订版: H, 档案已发布: Aug 4, 2016
从文件中提取

价格

状态

5962-0720401VXC5962-0720402VXCDAC5675AHFG/EM
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNo

打包

5962-0720401VXC5962-0720402VXCDAC5675AHFG/EM
N123
Pin525252
Package TypeHFGHFGHFG
Industry STD TermCFPCFPCFP
JEDEC CodeS-PQFP-FS-PQFP-FS-PQFP-F
Package QTY111
Width (mm)13.9713.9713.97
Length (mm)13.9713.9713.97
Thickness (mm)3.423.423.42
Pitch (mm)0.640.64.64
Max Height (mm)3.423.423.42
Mechanical Data下载下载下载
CarrierJEDEC TRAY (5+1)
Device MarkingDAC5675AHFG/EM

参数化

Parameters / Models5962-0720401VXC
5962-0720401VXC
5962-0720402VXC
5962-0720402VXC
DAC5675AHFG/EM
DAC5675AHFG/EM
ArchitectureCurrent SinkCurrent SinkCurrent Sink
DAC Channels111
DNL(Max), +/-LSB222
Gain Error(Max), %FSR101010
INL(Max), +/-LSB444
InterfaceParallel LVDSParallel LVDSParallel LVDS
Operating Temperature Range, C-55 to 115,-55 to 125,25 Only-55 to 115,-55 to 125,25 Only-55 to 115,-55 to 125,25 Only
Output Range Max., mA20
Output Range Min., mA2
Output TypeCurrentCurrentCurrent
Package GroupCFPCFPCFP
Package Size: mm2:W x L, PKGSee datasheet (CFP)See datasheet (CFP)See datasheet (CFP)
Power Consumption(Typ), mW660660660
RatingSpaceSpaceSpace
Reference: TypeIntIntInt
Resolution, Bits141414
SFDR, dB828282
SNR, dB676767
Sample / Update Rate, MSPS400400400
Settling Time, µs0.0120.0120.012

生态计划

5962-0720401VXC5962-0720402VXCDAC5675AHFG/EM
RoHSSee ti.comSee ti.comSee ti.com

应用须知

  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, 档案已发布: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • High Speed Digital-to-Analog Converters Basics (Rev. A)
    PDF, 829 Kb, 修订版: A, 档案已发布: Oct 23, 2012

模型线

制造商分类

  • Semiconductors> Space & High Reliability> Data Converter> Digital to Analog Converters