Datasheet Texas Instruments CDCP1803RTHR — 数据表

制造商Texas Instruments
系列CDCP1803
零件号CDCP1803RTHR
Datasheet Texas Instruments CDCP1803RTHR

数据表

1:3 LVPECL Clock Buffer with Programmable Divider, CDCP1803 datasheet
PDF, 873 Kb, 修订版: F, 档案已发布: Dec 4, 2013
从文件中提取

价格

状态

Lifecycle StatusObsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityNo

打包

Pin24
Package TypeRTH
Industry STD TermVQFNP
JEDEC CodeS-PQFP-N
Width (mm)4
Length (mm)4
Thickness (mm).85
Pitch (mm).5
Max Height (mm).9
Mechanical Data下载

参数化

Additive RMS Jitter(Typ)(fs)150
Approx. Price (US$)3.15 | 1ku
Input Frequency(Max)(MHz)800
Input LevelLVPECL
No. of Outputs3
Operating Temperature Range(C)-40 to 85
Output Frequency(Max)(MHz)800
Output LevelLVPECL
Package GroupVQFN
Package Size: mm2:W x L (PKG)24VQFN: 16 mm2: 4 x 4(VQFN)
RatingCatalog
VCC Out(V)3.3
VCC(V)3.3

生态计划

RoHSNot Compliant
Pb FreeNo

设计套件和评估模块

  • Evaluation Modules & Boards: ADS6143EVM
    ADS6143 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADS6123EVM
    ADS6123 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADS6125EVM
    ADS6125 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADS6124EVM
    ADS6124 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADS6122EVM
    ADS6122 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADS6144EVM
    ADS6144 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADS6142EVM
    ADS6142 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Dual Purposes: Data Buffer, The Other Face of CDCP1803
    PDF, 462 Kb, 档案已发布: Aug 13, 2004
    The CDCP1803 is a clock driver by design, but can be used as a data buffer. The CDCP1803 performance as a data buffer is demonstrated both in terms of the bit errorrate (BER) and eye pattern diagrams. The CDCP1803 is tested over several signaling rates and different PRBS patterns.

模型线

制造商分类

  • Semiconductors > Clock and Timing > Clock Buffers > Dividers