Datasheet Texas Instruments CDCM7005 — 数据表
| 制造商 | Texas Instruments |
| 系列 | CDCM7005 |
高性能，低相位噪声，低偏移时钟同步器，可将参考时钟同步到VCXO
数据表
CDCM7005 3.3-V High Performance Clock Synchronizer and Jitter Cleaner datasheet
PDF, 4.0 Mb, 修订版: G, 档案已发布: Aug 16, 2017
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价格
状态
| CDCM7005RGZR | CDCM7005RGZRG4 | CDCM7005RGZT | CDCM7005RGZTG4 | CDCM7005ZVA | CDCM7005ZVAR | CDCM7005ZVAT | |
|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | No | Yes | Yes | Yes | No | No |
打包
| CDCM7005RGZR | CDCM7005RGZRG4 | CDCM7005RGZT | CDCM7005RGZTG4 | CDCM7005ZVA | CDCM7005ZVAR | CDCM7005ZVAT | |
|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
| Pin | 48 | 48 | 48 | 48 | 64 | 64 | 64 |
| Package Type | RGZ | RGZ | RGZ | RGZ | ZVA | ZVA | ZVA |
| Industry STD Term | VQFN | VQFN | VQFN | VQFN | BGA | BGA | BGA |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PBGA-N | S-PBGA-N | S-PBGA-N |
| Package QTY | 2500 | 2500 | 250 | 250 | 348 | 1000 | 250 |
| Carrier | LARGE T&R | LARGE T&R | SMALL T&R | SMALL T&R | JEDEC TRAY (10+1) | LARGE T&R | SMALL T&R |
| Device Marking | CDCM7005 | CDCM7005 | CDCM7005 | CDCM7005 | CDCM7005 | CDCM7005 | CDCM7005 |
| Width (mm) | 7 | 7 | 7 | 7 | 8 | 8 | 8 |
| Length (mm) | 7 | 7 | 7 | 7 | 8 | 8 | 8 |
| Thickness (mm) | .9 | .9 | .9 | .9 | .96 | .96 | .96 |
| Pitch (mm) | .5 | .5 | .5 | .5 | .8 | .8 | .8 |
| Max Height (mm) | 1 | 1 | 1 | 1 | 1.4 | 1.4 | 1.4 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | CDCM7005RGZR | CDCM7005RGZRG4 | CDCM7005RGZT | CDCM7005RGZTG4 | CDCM7005ZVA | CDCM7005ZVAR | CDCM7005ZVAT |
|---|---|---|---|---|---|---|---|
| Divider Ratio | 1 to 16 | 1 to 16 | 1 to 16 | 1 to 16 | 1 to 16 | 1 to 16 | 1 to 16 |
| Input Level | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) |
| Number of Inputs | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
| Number of Outputs | 5 | 5 | 5 | 5 | 5 | 5 | 5 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Frequency(Max), MHz | 1500 | 1500 | 1500 | 1500 | 1500 | 1500 | 1500 |
| Output Level | LVCMOS,LVPECL | LVCMOS,LVPECL | LVCMOS,LVPECL | LVCMOS,LVPECL | LVCMOS,LVPECL | LVCMOS,LVPECL | LVCMOS,LVPECL |
| Package Group | VQFN | VQFN | VQFN | VQFN | BGA | BGA | BGA |
| Package Size: mm2:W x L, PKG | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) | 64BGA: 64 mm2: 8 x 8(BGA) | 64BGA: 64 mm2: 8 x 8(BGA) | 64BGA: 64 mm2: 8 x 8(BGA) |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Special Features | Programmable Delay | Programmable Delay | Programmable Delay | Programmable Delay | Programmable Delay | Programmable Delay | Programmable Delay |
| Supply Voltage(Max), V | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 |
| Supply Voltage(Min), V | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
生态计划
| CDCM7005RGZR | CDCM7005RGZRG4 | CDCM7005RGZT | CDCM7005RGZTG4 | CDCM7005ZVA | CDCM7005ZVAR | CDCM7005ZVAT | |
|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
| Pb Free | Yes | Yes | Yes |
应用须知
- TLK313x/CDCM7005 Multi-hop PerformancePDF, 2.4 Mb, 档案已发布: Nov 1, 2009
- Phase Noise/Phase Jitter Performance of CDCM7005PDF, 1.1 Mb, 档案已发布: Jul 26, 2005
模型线
系列: CDCM7005 (7)
制造商分类
- Semiconductors> Clock and Timing> Clock Jitter Cleaners> Single-Loop PLL