Datasheet Texas Instruments CDCM1802 — 数据表
| 制造商 | Texas Instruments |
| 系列 | CDCM1802 |
带可编程分频器的时钟缓冲器，LVPECL I / O + addl LVCMOS输出
数据表
CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O + Additional LVCMOS Output datasheet
PDF, 1.5 Mb, 修订版: C, 档案已发布: Jul 6, 2017
从文件中提取
状态
| CDCM1802RGTR | CDCM1802RGTRG4 | CDCM1802RGTT | CDCM1802RGTTG4 | |
|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | No | No | Yes |
打包
| CDCM1802RGTR | CDCM1802RGTRG4 | CDCM1802RGTT | CDCM1802RGTTG4 | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 16 | 16 | 16 | 16 |
| Package Type | RGT | RGT | RGT | RGT |
| Industry STD Term | VQFN | VQFN | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PQFP-N |
| Package QTY | 3000 | 3000 | 250 | 250 |
| Carrier | LARGE T&R | LARGE T&R | SMALL T&R | SMALL T&R |
| Device Marking | AJW | AJW | AJW | AJW |
| Width (mm) | 3 | 3 | 3 | 3 |
| Length (mm) | 3 | 3 | 3 | 3 |
| Thickness (mm) | .9 | .9 | .9 | .9 |
| Pitch (mm) | .5 | .5 | .5 | .5 |
| Max Height (mm) | 1 | 1 | 1 | 1 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | CDCM1802RGTR | CDCM1802RGTRG4 | CDCM1802RGTT | CDCM1802RGTTG4 |
|---|---|---|---|---|
| Additive RMS Jitter(Typ), fs | 150 | 150 | 150 | 150 |
| Input Frequency(Max), MHz | 800 | 800 | 800 | 800 |
| Input Level | LVPECL | LVPECL | LVPECL | LVPECL |
| Number of Outputs | 1 | 1 | 1 | 1 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Frequency(Max), MHz | 800 | 800 | 800 | 800 |
| Output Level | LVPECL,LVCMOS | LVPECL,LVCMOS | LVPECL,LVCMOS | LVPECL,LVCMOS |
| Package Group | VQFN | VQFN | VQFN | VQFN |
| Package Size: mm2:W x L, PKG | 16VQFN: 9 mm2: 3 x 3(VQFN) | 16VQFN: 9 mm2: 3 x 3(VQFN) | 16VQFN: 9 mm2: 3 x 3(VQFN) | 16VQFN: 9 mm2: 3 x 3(VQFN) |
| Rating | Catalog | Catalog | Catalog | Catalog |
| VCC, V | 3.3 | 3.3 | 3.3 | 3.3 |
| VCC Out, V | 3.3 | 3.3 | 3.3 | 3.3 |
生态计划
| CDCM1802RGTR | CDCM1802RGTRG4 | CDCM1802RGTT | CDCM1802RGTTG4 | |
|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant |
应用须知
- CDCM1802/CDCM1804PDF, 3.4 Mb, 档案已发布: Aug 4, 2004
模型线
系列: CDCM1802 (4)
制造商分类
- Semiconductors> Clock and Timing> Clock Buffers> Dividers