Datasheet Texas Instruments CDCLVP1212 — 数据表
| 制造商 | Texas Instruments |
| 系列 | CDCLVP1212 |
低抖动，2输入可选1:12通用至LVPECL缓冲器
数据表
CDCLVP1212 LVPECL Output, High-Performance Clock Buffer datasheet
PDF, 1.1 Mb, 修订版: E, 档案已发布: Dec 2, 2015
从文件中提取
状态
| CDCLVP1212RHAR | CDCLVP1212RHAT | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes |
打包
| CDCLVP1212RHAR | CDCLVP1212RHAT | |
|---|---|---|
| N | 1 | 2 |
| Pin | 40 | 40 |
| Package Type | RHA | RHA |
| Industry STD Term | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N |
| Package QTY | 2500 | 250 |
| Carrier | LARGE T&R | SMALL T&R |
| Device Marking | 1212 | 1212 |
| Width (mm) | 6 | 6 |
| Length (mm) | 6 | 6 |
| Thickness (mm) | .9 | .9 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1 | 1 |
| Mechanical Data | 下载 | 下载 |
参数化
| Parameters / Models | CDCLVP1212RHAR | CDCLVP1212RHAT |
|---|---|---|
| Additive RMS Jitter(Typ), fs | 57 | 57 |
| Input Frequency(Max), MHz | 2000 | 2000 |
| Input Level | LVCMOS,LVDS,LVPECL | LVCMOS,LVDS,LVPECL |
| Number of Outputs | 12 | 12 |
| Output Frequency(Max), MHz | 2000 | 2000 |
| Output Level | LVPECL | LVPECL |
| Package Group | VQFN | VQFN |
| Package Size: mm2:W x L, PKG | 40VQFN: 36 mm2: 6 x 6(VQFN) | 40VQFN: 36 mm2: 6 x 6(VQFN) |
| Rating | Catalog | Catalog |
| VCC, V | 2.5,3.3 | 2.5,3.3 |
| VCC Out, V | 2.5,3.3 | 2.5,3.3 |
生态计划
| CDCLVP1212RHAR | CDCLVP1212RHAT | |
|---|---|---|
| RoHS | Compliant | Compliant |
应用须知
- Clocking Design Guidelines: Unused PinsPDF, 158 Kb, 档案已发布: Nov 19, 2015
模型线
系列: CDCLVP1212 (2)
制造商分类
- Semiconductors> Clock and Timing> Clock Buffers> Differential