Datasheet Texas Instruments CDCLVD2108 — 数据表

制造商Texas Instruments
系列CDCLVD2108
Datasheet Texas Instruments CDCLVD2108

低抖动,双路1:8通用LVDS缓冲器

数据表

Dual 1:8 Low Additive Jitter LVDS Buffer datasheet
PDF, 933 Kb, 修订版: C, 档案已发布: Dec 21, 2010
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状态

CDCLVD2108RGZRCDCLVD2108RGZT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNo

打包

CDCLVD2108RGZRCDCLVD2108RGZT
N12
Pin4848
Package TypeRGZRGZ
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY2500250
CarrierLARGE T&RSMALL T&R
Device MarkingCDCLVDCDCLVD
Width (mm)77
Length (mm)77
Thickness (mm).9.9
Pitch (mm).5.5
Max Height (mm)11
Mechanical Data下载下载

参数化

Parameters / ModelsCDCLVD2108RGZR
CDCLVD2108RGZR
CDCLVD2108RGZT
CDCLVD2108RGZT
Additive RMS Jitter(Typ), fs171171
Input Frequency(Max), MHz800800
Input LevelLVCMOS,LVDS,LVPECLLVCMOS,LVDS,LVPECL
Number of Outputs1616
Operating Temperature Range, C-40 to 85-40 to 85
Output Frequency(Max), MHz800800
Output LevelLVDSLVDS
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG48VQFN: 49 mm2: 7 x 7(VQFN)48VQFN: 49 mm2: 7 x 7(VQFN)
RatingCatalogCatalog
VCC, V2.52.5
VCC Out, V2.52.5

生态计划

CDCLVD2108RGZRCDCLVD2108RGZT
RoHSCompliantCompliant

模型线

系列: CDCLVD2108 (2)

制造商分类

  • Semiconductors> Clock and Timing> Clock Buffers> Differential