Datasheet Texas Instruments CDCLVC1104PW — 数据表

制造商Texas Instruments
系列CDCLVC1104
零件号CDCLVC1104PW
Datasheet Texas Instruments CDCLVC1104PW

低抖动,1:4 LVCMOS扇出时钟缓冲器8-TSSOP -40至85

数据表

CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family datasheet
PDF, 1.6 Mb, 修订版: B, 档案已发布: Feb 24, 2017
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

打包

Pin8
Package TypePW
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY150
CarrierTUBE
Device MarkingC9C4
Width (mm)4.4
Length (mm)3
Thickness (mm)1
Pitch (mm).65
Max Height (mm)1.2
Mechanical Data下载

参数化

Additive RMS Jitter(Typ)70 fs
Input Frequency(Max)250 MHz
Input LevelLVCMOS
Number of Outputs4
Operating Temperature Range-40 to 85 C
Output Frequency(Max)250 MHz
Output LevelLVCMOS
Package GroupTSSOP
Package Size: mm2:W x L8TSSOP: 19 mm2: 6.4 x 3(TSSOP) PKG
RatingCatalog
VCC Out2.5,3.3 V

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: CDCLVC1104EVM
    CDCLVC1104 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: PP-SALB2-EVM
    Smart Amplifier Speaker Characterization Board Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer
    PDF, 518 Kb, 档案已发布: Nov 30, 2010
    The CDCLVC11xx buffer family from Texas Instruments has a nominal voltage supply of 2.5 V and 3.3 V. With the simple employment of an external RC network, this family of devices can handle incoming signals whose voltage levels go up to 1.8 V. This application report explains how to implement this network and dimension its discrete components, without impacting the specifications of additive ji

模型线

系列: CDCLVC1104 (2)

制造商分类

  • Semiconductors > Clock and Timing > Clock Buffers > Single-Ended