Datasheet Texas Instruments CDCE913-Q1 — 数据表

制造商Texas Instruments
系列CDCE913-Q1
Datasheet Texas Instruments CDCE913-Q1

具有2.5V或3.3V LVCMOS输出的汽车类可编程1-PLL VCXO时钟合成器

数据表

CDCEx913-Q1 Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V Outputs datasheet
PDF, 1.5 Mb, 修订版: C, 档案已发布: Nov 9, 2016
从文件中提取

价格

状态

CDCE913QPWRQ1
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

打包

CDCE913QPWRQ1
N1
Pin14
Package TypePW
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingCE913Q
Width (mm)4.4
Length (mm)5
Thickness (mm)1
Pitch (mm).65
Max Height (mm)1.2
Mechanical Data下载

参数化

Parameters / ModelsCDCE913QPWRQ1
CDCE913QPWRQ1
Input LevelCrystal,LVCMOS
Number of Outputs3
Operating Temperature Range, C-40 to 125
Output Frequency(Max), MHz230
Output LevelLVCMOS
Package GroupTSSOP
Package Size: mm2:W x L, PKG14TSSOP: 32 mm2: 6.4 x 5(TSSOP)
Special FeaturesIntegrated EEPROM,I2C,Pin Programming,Spread Spectrum Clocking (SSC)
VCC Out, V3.3

生态计划

CDCE913QPWRQ1
RoHSCompliant

应用须知

  • General I2C / EEPROM usage for the CDCE(L)9xx family
    PDF, 40 Kb, 档案已发布: Jan 26, 2010
  • Crystal or Crystal Oscillator Replacement with Silicon Devices
    PDF, 894 Kb, 档案已发布: Jun 18, 2014
    This application report is a general guide that outlines the advantages of using silicon-based timingdevices from Texas Instruments to generate system clocking solutions. This report covers theconventional way to derive system clocks using crystals and crystal oscillators, disadvantages of usingthese mechanical components, and details on replacing them with silicon-based timing devices from
  • VCXO Application Guideline for CDCE(L)9xx Family (Rev. A)
    PDF, 107 Kb, 修订版: A, 档案已发布: Apr 23, 2012
  • Practical consideration on choosing a crystal for CDCE(L)9xx family
    PDF, 60 Kb, 档案已发布: Mar 24, 2008
  • Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913
    PDF, 297 Kb, 档案已发布: Sep 23, 2009
    This document presents a method to smoothly change frequency by IВІCв„ў protocol on Texas Instruments CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913 Clock Synthesizers, thus avoiding unnecessary intermediate frequencies. It also includes a code example to generate the IВІC protocol for the CDCE(L)9xx with the TMS320C645x.
  • Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency
    PDF, 860 Kb, 档案已发布: Mar 31, 2008
    Generating a high-frequency system clock Fs (128fs to 768fs) from a low-frequency sampling clock fs (10 kHz to 200 kHz) is challenging, while attempting to maintain low phase jitter. A traditional phase-lock loop (PLL) can do the frequency translation, but the added phase jitter prevents the generated system clock signal from effectively driving high-performance audio data converters. This applica
  • Troubleshooting I2C Bus Protocol
    PDF, 184 Kb, 档案已发布: Oct 19, 2009
    When using the I2Cв„ў bus protocol, the designer must ensure that the hardware complies with the I2C standard. This application report describes the I2C protocol and provides guidelines on debugging a missing acknowledgment, selecting the pullup resistors, or meeting the maximum capacitance load of an I2C bus. A conflict occurs if devices sharing the I2C bus have the same slave address. This

模型线

系列: CDCE913-Q1 (1)

制造商分类

  • Semiconductors> Clock and Timing> Clock Generators> General Purpose