Datasheet Texas Instruments CDC586 — 数据表

制造商	Texas Instruments
系列	CDC586

数据表

状态

打包

参数化

Parameters / Models	CDC586PAH	CDC586PAHG4
Absolute Jitter (Peak-to-Peak Cycle or Period Jitter), ps	200	200
Number of Outputs	12	12
Operating Frequency Range(Max), MHz	100	100
Operating Frequency Range(Min), MHz	25	25
Package Group	TQFP	TQFP
Package Size: mm2:W x L, PKG	52TQFP: 144 mm2: 12 x 12(TQFP)	52TQFP: 144 mm2: 12 x 12(TQFP)
Rating	Catalog	Catalog
VCC, V	3.3	3.3
t(phase error), ps	500	500
tsk(o), ps	500	500

生态计划

应用须知

• 下载
  Phase-Lock Loop-Based (PLL) Clock Drivers: Benefits Versus Costs (Rev. A)
  PDF, 51 Kb, 修订版: A, 档案已发布: Mar 1, 1997
  This document provides an overview of a PLL clock driver. The advantages and disadvantages of PLLs and the cost in designs are discussed. TI manufactures three low-voltage high-performance PLL clock drivers, the CDC2582, CDC2586, and the CDC2586.
• 下载
  Application and Design Considerations for CDC5xx Phase-Lock Loop Clock Drivers
  PDF, 101 Kb, 档案已发布: Apr 1, 1996
  Today?s high-speed system designs require stringent propagation and skew parameters to maintain desired system performance. TI developed the CDC5XX platform of PLL clock drivers to meet the need for high-performance clock system components. This document describes the features and functions of the CDC5XX and discusses design considerations and configurations for the CDC586, CDC582, and CDC2582 clo

模型线

制造商分类

• Semiconductors> Clock and Timing> Clock Buffers> Zero Delay Buffers