[ /Title
(CD74
HC75,
CD74
HCT75
)
/Subject
(Dual
2-Bit
Bistabl
e CD54HC75, CD74HC75,
CD54HCT75, CD74HCT75
Data sheet acquired from Harris Semiconductor
SCHS135F Dual 2-Bit Bistable
Transparent Latch March 1998 -Revised October 2003 Features Description True and Complementary Outputs The ’HC75 and ’HCT75 are dual 2-bit bistable transparent
latches. Each one of the 2-bit latches is controlled by
separate Enable inputs (1E and 2E) which are active LOW.
When the Enable input is HIGH data enters the latch and
appears at the Q output. When the Enable input (1E and 2E)
is LOW the output is not affected. Buffered Inputs and Outputs Fanout (Over Temperature Range)
-Standard Outputs . 10 LSTTL Loads
-Bus Driver Outputs . 15 LSTTL Loads Ordering Information Wide Operating Temperature Range . -55oC to 125oC Balanced Propagation Delay and Transition Times PART NUMBER Significant Power Reduction Compared to LSTTL
Logic ICs HC Types …
