Datasheet Texas Instruments CD74ACT273 — 数据表

制造商Texas Instruments
系列CD74ACT273
Datasheet Texas Instruments CD74ACT273

具有复位功能的八路D类触发器

数据表

Octal D Flip-Flop with Reset datasheet
PDF, 944 Kb, 修订版: B, 档案已发布: Jul 1, 2002
从文件中提取

价格

状态

CD74ACT273ECD74ACT273EE4CD74ACT273MCD74ACT273M96CD74ACT273M96E4CD74ACT273M96G4CD74ACT273MG4CD74ACT273PWCD74ACT273PWRCD74ACT273PWRE4CD74ACT273PWRG4CD74ACT273SM96CD74ACT273SM96G4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNoNoNoNoNo

打包

CD74ACT273ECD74ACT273EE4CD74ACT273MCD74ACT273M96CD74ACT273M96E4CD74ACT273M96G4CD74ACT273MG4CD74ACT273PWCD74ACT273PWRCD74ACT273PWRE4CD74ACT273PWRG4CD74ACT273SM96CD74ACT273SM96G4
N12345678910111213
Pin20202020202020202020202020
Package TypeNNDWDWDWDWDWPWPWPWPWDBDB
Industry STD TermPDIPPDIPSOICSOICSOICSOICSOICTSSOPTSSOPTSSOPTSSOPSSOPSSOP
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY202025200020002000257020002000200020002000
CarrierTUBETUBETUBELARGE T&RLARGE T&RLARGE T&RTUBETUBELARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingCD74ACT273ECD74ACT273EACT273MACT273MACT273MACT273MACT273MHM273HM273HM273HM273ACT273SMACT273SM
Width (mm)6.356.357.57.57.57.57.54.44.44.44.45.35.3
Length (mm)24.3324.3312.812.812.812.812.86.56.56.56.57.27.2
Thickness (mm)4.574.572.352.352.352.352.3511111.951.95
Pitch (mm)2.542.541.271.271.271.271.27.65.65.65.65.65.65
Max Height (mm)5.085.082.652.652.652.652.651.21.21.21.222
Mechanical Data下载下载下载下载下载下载下载下载下载下载下载下载下载

参数化

Parameters / ModelsCD74ACT273E
CD74ACT273E
CD74ACT273EE4
CD74ACT273EE4
CD74ACT273M
CD74ACT273M
CD74ACT273M96
CD74ACT273M96
CD74ACT273M96E4
CD74ACT273M96E4
CD74ACT273M96G4
CD74ACT273M96G4
CD74ACT273MG4
CD74ACT273MG4
CD74ACT273PW
CD74ACT273PW
CD74ACT273PWR
CD74ACT273PWR
CD74ACT273PWRE4
CD74ACT273PWRE4
CD74ACT273PWRG4
CD74ACT273PWRG4
CD74ACT273SM96
CD74ACT273SM96
CD74ACT273SM96G4
CD74ACT273SM96G4
3-State OutputNoNoNoNoNoNoNoNoNoNoNoNoNo
Bits8888888888888
F @ Nom Voltage(Max), Mhz90909090909090909090909090
ICC @ Nom Voltage(Max), mA0.080.080.080.080.080.080.080.080.080.080.080.080.08
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-24
Package GroupPDIPPDIPSOICSOICSOICSOICSOICTSSOPTSSOPTSSOPTSSOPSSOPSSOP
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20SSOP: 56 mm2: 7.8 x 7.2(SSOP)20SSOP: 56 mm2: 7.8 x 7.2(SSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNoNoNoNoNo
Technology FamilyACTACTACTACTACTACTACTACTACTACTACTACTACT
VCC(Max), V5.55.55.55.55.55.55.55.55.55.55.55.55.5
VCC(Min), V1.51.51.51.51.51.51.51.51.51.51.51.51.5
Voltage(Nom), V5555555555555
tpd @ Nom Voltage(Max), ns12.312.312.312.312.312.312.312.312.312.312.312.312.3

生态计划

CD74ACT273ECD74ACT273EE4CD74ACT273MCD74ACT273M96CD74ACT273M96E4CD74ACT273M96G4CD74ACT273MG4CD74ACT273PWCD74ACT273PWRCD74ACT273PWRE4CD74ACT273PWRG4CD74ACT273SM96CD74ACT273SM96G4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

应用须知

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, 修订版: A, 档案已发布: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, 档案已发布: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

模型线

制造商分类

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop